PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 332
PNX1311EH/G
Manufacturer Part Number
PNX1311EH/G
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1311EHG.pdf
(548 pages)
Specifications of PNX1311EH/G
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
Clipped unsigned subtract
SYNTAX
FUNCTION
DESCRIPTION
unsigned range [2
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r30 = 0x1200, r40 = 0xff
r10 = 0, r30 = 0x1200, r40 = 0xff
r20 = 1, r30 = 0x1200, r40 = 0xff
r50 = 0, r90 = 1
r70 = 0x80000001, r80 = 0xffffffff
As shown below, the
The
[ IF rguard ] dspusub rsrc1 rsrc2 → rdest
if rguard then {
}
rsrc1
temp ← zero_ext32to64(rsrc1) – zero_ext32to64(rsrc2)
if (signed)temp < 0 then
else
dspusub
31
rdest ← 0
rdest ← temp<31:0>
Initial Values
32
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
–1..0] (or [0xffffffff..0]), and stores the clipped value into rdest.
dspusub
Full-precision
unsigned
33-bit result
rdest
32
31
dspusub r30 r40 → r60
IF r10 dspusub r30 r40 → r80
IF r20 dspusub r30 r40 → r100
dspusub r50 r90 → r110
dspusub r70 r80 → r120
operation computes unsigned difference rsrc1–rsrc2, clips the result into the
0
Clip to [2
Operation
unsigned
signed
−
32
–1..0]
PRELIMINARY SPECIFICATION
rsrc2
31
PNX1300/01/02/11 DSPCPU Operations
0
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r60 ← 0x1101
no change, since guard is false
r100 ← 0x1101
r110 ← 0
r120 ← 0
dspiabs dspiadd dspimul
dspisub dspuadd dspumul
unsigned
ATTRIBUTES
SEE ALSO
Result
dspusub
dspalu
1, 3
No
69
—
0
2
2
A-34
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