PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 400
PNX1311EH/G
Manufacturer Part Number
PNX1311EH/G
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1311EHG.pdf
(548 pages)
Specifications of PNX1311EH/G
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
Interruptible jump immediate
SYNTAX
FUNCTION
DESCRIPTION
interrupts or exceptions are pending, the DPC, PC, and SPC registers are set equal to address. If an exception or
interrupts is pending, DPC is set equal to address and a service routine is invoked, where exceptions have priorities
over interrupts. address is an immediate opcode modifier.
the jump. If the LSB of rguard is 1, the instruction executes as previously described; otherwise, the jump will not be
taken and PC, DPC, and SPC are not modified.
EXAMPLES
r30 = 0
r40 = 1
The
The
[ IF rguard ] ijmpi(address)
if rguard then {
}
DPC ← address
if exception is pending then
else if interrupt is pending then
else
ijmpi
ijmpi
service exception
service interrupts
PC, SPC ← address
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB adds a condition to
operation changes the program flow and allows pending interrupts or exceptions to be serviced. If no
ijmpi(0x330)
IF r30 ijmpi(0x8000)
IF r40 ijmpi(0x8000)
Operation
PRELIMINARY SPECIFICATION
PNX1300/01/02/11 DSPCPU Operations
program execution continues at 0x330
since guard is false, program execution con-
tinues with next sequential instruction
program execution continues at 0x8000
jmpf jmpt jmpi ijmpf ijmpt
Function unit
Operation code
Number of operands
Modifier
Modifier range
Delay
Issue slots
ATTRIBUTES
SEE ALSO
Result
ijmpi
0..0xffffffff
branch
32 bits
2, 3, 4
179
0
3
A-102
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