PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 440
PNX1311EH/G
Manufacturer Part Number
PNX1311EH/G
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1311EHG.pdf
(548 pages)
Specifications of PNX1311EH/G
Lead Free Status / RoHS Status
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Philips Semiconductors
Pack most-significant 16 bits
SYNTAX
FUNCTION
DESCRIPTION
and rsrc2 into rdest. The halfword from rsrc1 is packed into the most-significant halfword of rdest; the halfword from
rsrc2 is packed into the least-significant halfword of rdest.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is unchanged.
EXAMPLES
r30 = 0x12345678, r40 = 0xaabbccdd
r10 = 0, r40 = 0xaabbccdd, r30 = 0x12345678
r20 = 1, r40 = 0xaabbccdd, r30 = 0x12345678
As shown below, the
The
[ IF rguard ] pack16msb rsrc1 rsrc2 → rdest
if rguard then {
}
rsrc1
pack16msb
31
rdest<15:0> ← rsrc2<31:16>
rdest<31:16> ← rsrc1<31:16>
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
pack16msb
15
rdest
31
operation packs the two most-significant halfwords from the arguments rsrc1
pack16msb r30 r40 → r50
IF r10 pack16msb r40 r30 → r60
IF r20 pack16msb r40 r30 → r70
0
15
Operation
PRELIMINARY SPECIFICATION
rsrc2
31
PNX1300/01/02/11 DSPCPU Operations
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
pack16lsb packbytes
r50 ← 0x1234aabb
no change, since guard is false
r70 ← 0xaabb1234
mergelsb mergemsb
15
pack16msb
ATTRIBUTES
SEE ALSO
Result
1, 2, 3, 4, 5
alu
No
54
—
0
2
1
A-142
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