ADSP-BF592KCPZ Analog Devices Inc, ADSP-BF592KCPZ Datasheet - Page 17

58T4522

ADSP-BF592KCPZ

Manufacturer Part Number
ADSP-BF592KCPZ
Description
58T4522
Manufacturer
Analog Devices Inc
Datasheets

Specifications of ADSP-BF592KCPZ

Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Rohs Compliant
YES
Frequency
400MHz
Embedded Interface Type
PPI, SPI, UART
No. Of I/o's
32
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
LFCSP
No. Of Pins
64
Core Supply Voltage
1.4V
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-BF592KCPZ-2
Manufacturer:
BROADCOM
Quantity:
154
Preliminary Technical Data
Table 9. Signal Descriptions (Continued)
Signal Name
TWI
JTAG Port
Clock
Mode Controls
External Regulator Control
Power Supplies
PG11–GPIO/SPI1_SSEL5/PPI_D3
PG12–GPIO/SPI1_SSEL2/PPI_D4/WAKEN2
PG13–GPIO/SPI1_SSEL1/SPI1_SS/PPI_D5
PG14–GPIO/SPI1_SSEL4/PPI_D6/TACLK1
PG15–GPIO/SPI1_SSEL6/PPI_D7/TACLK2
SCL
SDA
TCK
TDO
TDI
TMS
TRST
EMU
CLKIN
XTAL
EXT_CLK
RESET
NMI
BMODE2–0
PPI_CLK
PG
EXT_WAKE
V
V
GND
DDEXT
DDINT
I/O
I/O
Type Function
I/O GPIO/SPI1 Slave Select Enable 5/PPI Data 3
I/O GPIO/SPI1 Slave Select Enable 2 Output/PPI Data 4/Wake Enable 2
I/O GPIO/SPI1 Slave Select Enable 1 Output/PPI Data 5/SPI1 Slave Select Input
I/O GPIO/SPI1 Slave Select Enable 4/PPI Data 6/Timer 1 Auxiliary Clock Input
I/O GPIO/SPI1 Slave Select Enable 6/PPI Data 7/Timer 2 Auxiliary Clock Input
Rev. PrC | Page 17 of 46 | August 2010
O JTAG Serial Data Out
O Emulation Output
O Crystal Output
O External Clock Output pin/System Clock Output
O Wake up Indication
G
P
P
I
I
I
I
I
I
I
I
I
I
TWI Serial Clock (This signal is an open-drain output and requires a pull-up
resistor. Consult version 2.1 of the I
value.)
TWI Serial Data (This signal is an open-drain output and requires a pull-up
resistor. Consult version 2.1 of the I
value.)
JTAG CLK
JTAG Serial Data In
JTAG Mode Select
JTAG Reset
(This lead should be pulled low if the JTAG port is not used.)
CLK/Crystal In
Reset
Nonmaskable Interrupt
(This lead should be pulled high when not used.)
Boot Mode Strap 2–0
PPI Clock Input
Power Good indication
ALL SUPPLIES MUST BE POWERED
See
I/O Power Supply
Internal Power Supply
Ground for All Supplies (Back Side of LFCSP Package.)
Operating Conditions on Page
2
2
18.
C specification for the proper resistor
C specification for the proper resistor
ADSP-BF592
Driver
Type
A
A
A
A
A
A
A
A
B
B
C

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