ADSP-BF592KCPZ Analog Devices Inc, ADSP-BF592KCPZ Datasheet - Page 36

• Manufacturer Part Number: ADSP-BF592KCPZ
• Description: 58T4522
• Manufacturer: Analog Devices Inc

Specifications of ADSP-BF592KCPZ

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Rohs Compliant: YES
• Frequency: 400MHz
• Embedded Interface Type: PPI, SPI, UART
• No. Of I/o's: 32
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 64
• Core Supply Voltage: 1.4V
• Lead Free Status / RoHS Status: Compliant

ADSP-BF592
JTAG Test And Emulation Port Timing
Table 33
Table 33. JTAG Port Timing
1
2
3
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristics
t
t
System Inputs = SCL, SDA, PF15–0, PG15–0, PH2–0, TCK, NMI, BMODE3–0, PG.
50 MHz Maximum
System Outputs = CLKOUT, SCL, SDA, PF15–0, PG15–0, PH2–0, TDO, EMU, EXT_WAKE.
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
DTDO
DSYS
and
OUTPUTS
SYSTEM
SYSTEM
INPUTS
TCK
TMS
TDO
Figure 23
TDI
TCK Period
TDI, TMS Setup Before TCK High
TDI, TMS Hold After TCK High
System Inputs Setup Before TCK High
System Inputs Hold After TCK High
TRST Pulse Width
TDO Delay from TCK Low
System Outputs Delay After TCK Low
describe JTAG port operations.
2
(measured in TCK cycles)
t
DSYS
t
DTDO
t
TCK
1
Rev. PrC | Page 36 of 46 | August 2010
3
t
1
SSYS
t
STAP
Figure 23. JTAG Port Timing
t
HTAP
t
HSYS
Min
TBD
TBD
TBD
TBD
TBD
TBD
1.8V Nominal
V
DDEXT
Max
TBD
TBD
Preliminary Technical Data
2.5/3.3V Nominal
Min
20
4
4
5
5
4
V
DDEXT
Max
10
13
Unit
TCK
ns
ns
ns
ns
ns
ns
ns