IDT82V3202NLG8 IDT, Integrated Device Technology Inc, IDT82V3202NLG8 Datasheet - Page 3

• Manufacturer Part Number: IDT82V3202NLG8
• Description: IC PLL WAN EBU SGL 68-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3202NLG8

• Input: CMOS
• Output: CMOS, LVDS, PECL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 68-VFQFN, 68-VFQFPN
• Frequency-max: 622.08MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3202NLG8

FEATURES .............................................................................................................................................................................. 9
APPLICATIONS....................................................................................................................................................................... 9
DESCRIPTION....................................................................................................................................................................... 10
FUNCTIONAL BLOCK DIAGRAM ........................................................................................................................................ 11
1 PIN ASSIGNMENT ........................................................................................................................................................... 12
2 PIN DESCRIPTION .......................................................................................................................................................... 14
3 FUNCTIONAL DESCRIPTION ......................................................................................................................................... 18
Table of Contents
3.1 RESET ........................................................................................................................................................................................................... 18
3.2 MASTER CLOCK .......................................................................................................................................................................................... 18
3.3 INPUT CLOCKS & FRAME SYNC SIGNALS ............................................................................................................................................... 19
3.4 INPUT CLOCK PRE-DIVIDER ...................................................................................................................................................................... 20
3.5 INPUT CLOCK QUALITY MONITORING ..................................................................................................................................................... 21
3.6 DPLL INPUT CLOCK SELECTION .............................................................................................................................................................. 23
3.7 SELECTED INPUT CLOCK MONITORING .................................................................................................................................................. 25
3.8 SELECTED INPUT CLOCK SWITCH ........................................................................................................................................................... 27
3.9 SELECTED INPUT CLOCK STATUS VS. DPLL OPERATING MODE ....................................................................................................... 29
3.10 DPLL OPERATING MODE ........................................................................................................................................................................... 31
HIGHLIGHTS.................................................................................................................................................................................................... 9
MAIN FEATURES ............................................................................................................................................................................................ 9
OTHER FEATURES ......................................................................................................................................................................................... 9
3.3.1
3.3.2
3.5.1
3.5.2
3.6.1
3.6.2
3.6.3
3.7.1
3.7.2
3.7.3
3.8.1
3.8.2
3.8.3
3.10.1 Six Operating Modes ..................................................................................................................................................................... 31
Input Clocks .................................................................................................................................................................................... 19
Frame SYNC Input Signals ............................................................................................................................................................ 19
Activity Monitoring ......................................................................................................................................................................... 21
Frequency Monitoring ................................................................................................................................................................... 22
External Fast Selection .................................................................................................................................................................. 23
Forced Selection ............................................................................................................................................................................ 24
Automatic Selection ....................................................................................................................................................................... 24
DPLL Locking Detection ................................................................................................................................................................ 25
3.7.1.1
3.7.1.2
3.7.1.3
3.7.1.4
Locking Status ............................................................................................................................................................................... 25
Phase Lock Alarm .......................................................................................................................................................................... 25
Input Clock Validity ........................................................................................................................................................................ 27
Selected Input Clock Switch ......................................................................................................................................................... 27
3.8.2.1
3.8.2.2
Selected / Qualified Input Clocks Indication ................................................................................................................................ 27
3.10.1.1 Free-Run Mode ................................................................................................................................................................ 31
3.10.1.2 Pre-Locked Mode ............................................................................................................................................................. 31
3.10.1.3 Locked Mode .................................................................................................................................................................... 31
3.10.1.4 Lost-Phase Mode ............................................................................................................................................................. 31
3.10.1.5 Holdover Mode ................................................................................................................................................................. 31
Fast Loss .......................................................................................................................................................................... 25
Coarse Phase Loss .......................................................................................................................................................... 25
Fine Phase Loss ............................................................................................................................................................... 25
Hard Limit Exceeding ....................................................................................................................................................... 25
Revertive Switch ............................................................................................................................................................... 27
Non-Revertive Switch ....................................................................................................................................................... 27
3.10.1.3.1 Temp-Holdover Mode .................................................................................................................................... 31
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Table of Contents
September 11, 2009