ISL12022MIBZ-T Intersil, ISL12022MIBZ-T Datasheet - Page 24

• Manufacturer Part Number: ISL12022MIBZ-T
• Description: IC RTC/CALENDAR TEMP SENS 20SOIC
• Manufacturer: Intersil
• Type: Clock/Calendarr

Specifications of ISL12022MIBZ-T

• Memory Size: 128B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISL12022MIBZ-TCT

ALPHA Hot Register (ALPHAH)
The ALPHA Hot variable is 7 bits and is defined as the
temperature coefficient of Crystal from the XT0 value to
+85°C (both Alpha Hot and Alpha Cold must be
programmed to provide full temperature
compensation). It is normally given in units of ppm/°C
with a typical value of -0.034. Like the ALPHA Cold
ADDR
2Dh
7
D
XT<4:0>
01111
01110
01101
01100
01011
01010
01001
01000
00111
00110
00101
00100
00011
00010
00001
00000
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
ALP_H6 ALP_H5 ALP_H4 ALP_H3 ALP_H2 ALP_H1 ALP_H0
TABLE 25. ALPHAH REGISTER
6
TABLE 24. XT0 VALUES
5
24
4
3
TEMPERATURE
TURNOVER
32.5
32.0
31.5
30.5
29.5
29.0
28.5
28.0
27.5
27.0
26.5
26.0
25.5
25.0
25.0
24.5
24.0
23.5
23.0
22.5
22.0
21.5
21.0
20.5
20.0
19.5
19.0
18.5
18.0
17.5
2
31
30
1
ISL12022M
0
2
,
version, a scaled version of the absolute value of this
coefficient is used in order to get an integer value.
Therefore, ALP_H <7:0> is defined as the (|Actual
Alpha Hot Value| x 2048) and converted to binary. For
example, a crystal with Alpha Hot of -0.034ppm/°C
first scaled (|2048*(-0.034)| = 70d) and then
converted to a binary number of 01000110b.
The practical range of Actual ALPHAH values is from
-0.020 to -0.060.
The ISL12022M has a preset ALPHAH value
corresponding to the crystal in the module. This value is
recalled on initial power-up and is preset in device
production. It is READ ONLY and cannot be
overwritten by the user.
User Registers (Accessed by
Using Slave Address
1010111x)
Addresses [00h to 7Fh]
These registers are 128 bytes of battery-backed user
SRAM. The separate I
read and write to these registers.
I
The ISL12022M supports a bi-directional bus oriented
protocol. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device as
the receiver. The device controlling the transfer is the
master and the device being controlled is the slave. The
master always initiates data transfers and provides the
clock for both transmit and receive operations.
Therefore, the ISL12022M operates as a slave device in
all applications.
All communication over the I
sending the MSB of each byte of data first.
Protocol Conventions
Data states on the SDA line can change only during SCL
LOW periods. SDA state changes during SCL HIGH are
reserved for indicating START and STOP conditions (see
Figure 15). On power-up of the ISL12022M, the SDA pin
is in the input mode.
All I
condition, which is a HIGH to LOW transition of SDA
while SCL is HIGH. The ISL12022M continuously
monitors the SDA and SCL lines for the START condition
and does not respond to any command until this
condition is met (see Figure 15). A START condition is
ignored during the power-up sequence.
All I
STOP condition, which is a LOW to HIGH transition of
SDA while SCL is HIGH (see Figure 15). A STOP condition
at the end of a read operation or at the end of a write
operation to memory only places the device in its
standby mode.
2
C Serial Interface
2
2
C interface operations must begin with a START
C interface operations must be terminated by a
2
C slave address must be used to
2
C interface is conducted by
June 4, 2010
FN6668.7
2
is