ISL12022MIBZ-T Intersil, ISL12022MIBZ-T Datasheet - Page 30

• Manufacturer Part Number: ISL12022MIBZ-T
• Description: IC RTC/CALENDAR TEMP SENS 20SOIC
• Manufacturer: Intersil
• Type: Clock/Calendarr

Specifications of ISL12022MIBZ-T

• Memory Size: 128B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISL12022MIBZ-TCT

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Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to
web to make sure you have the latest Rev. (Continued)
07/22/09
07/10/09
12/18/08
12/15/08
12/09/08
11/03/08
02/29/08
3/21/08
DATE
REVISION
FN6668.5
FN6668.5
FN6668.4
FN6668.3
FN6668.2
FN6668.1
FN6668.1
FN6668.0
30
www.intersil.com/products
Corrected date from July 10, 2008 to July 10, 2009 and repost. No rev, no formal review
necessary per M Casino.
Refer to following link for detailed list of changes:
http://intranet.intrepid.intersil.com/Windchill/wtcore/jsp/isil/ViewIsilPart.jsp?oid=VR%3Aext
.isil.part.mcol.MCOL%3A114266645
Changed Storage Temperature on page 3 from:
"-65°C to +165°C" to "-40°C to +85°C"
Added spec to datasheet - Delta FoutI on page 3.
Added Tape and Reel Reference Note to Ordering Information.
Updated the following parameters in the spec table on page 3:
1. Changed Max for IDD1@5V from 6.5 to 7, and IDD1 @3V from 5.5 to 6.
2. Removed ÄATLSB (AT Sensitivity per LSB) from spec table.
Complete overhaul of data sheet. Changed web destination to YES; ready for formal review in
support of POQ
Revised with final specs and text. Changes include:
Added text and equations for Ibat for temp sense ON, and for relative accuracy for 1m vs 10m
interval
Added text clarifying that no compensation at Vbat<2.7V
Revised entire Daylights savings time section
Added Application Example for DST
Added requirement for Vbat>1.8V in Vbat note.
Added apps circuit to survive Vbat<1.8V
Corrected All occurrences of Alpha tables
Corrected equations in NPPM section
BOLD and shade the COMPENSATON registers in the big table to indicate READ ONLY, add note
at top of table. Add READ ONLY statements to IATR, ALPHA, BETA, XT0, ALPHAH
Fixed blank bits in register tables and in text.
Register table: Change default values for compensation to xx's, they are different with each
device.
Added Datasheet curves
Add statement to Apps section on crystal handling similar to Maxim's
Updated Pb-free note according to lead finish (Order Info)
**8/11 - Vaulted NO to the web. Datasheet being updated by Jim Pflasterer with additional
edits. This version is NOT a released version**
- Removed the "VDD" from the title on the first page. Updated File info and MCOL properties
page too.
- Global change for VBAT and VDD throughout document. Made the "BAT" and "DD" subscript.
- Included Battery Reseal Function in Features and Description on page 1
- Note 3 page 5, lower case "i" as in "inactive"
- Included symbol "Temp" for temp sensor accuracy in DC table on page 3
- First paragraph of DST Forward Registers had incorrect address stated (changed from 15h to
20h)
- Corrected register 20h on Page 20, added the DSTE bit to column 7
-EQ2, page 20, corrected to "NPPM = IPPM+ALPHA(T-XT0)2/4096"
Initial Release with FN6668 making this a Rev 0.
ISL12022M
http://rel.intersil.com/reports/search.php
ISL12022M
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CHANGE
June 4, 2010
FN6668.7