HYB 39S128160CE-7.5 Infineon Technologies, HYB 39S128160CE-7.5 Datasheet - Page 19

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HYB 39S128160CE-7.5

Manufacturer Part Number
HYB 39S128160CE-7.5
Description
Manufacturer
Infineon Technologies
Type
SDRAMr
Datasheet

Specifications of HYB 39S128160CE-7.5

Organization
8Mx16
Density
128Mb
Address Bus
14b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
100mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
INFINEON Technologies
3. If clock rising time is longer than 1 ns, a time (
4. If
5. These parameter account for the number of clock cycles and depend on the operating frequency
6. Access time from clock tac is 4.6 ns for PC133 components with no termination and 0 pF load,
7. The write recovery time twr = 2 CLK cycles is a digital interlock on this device. Special devices
of the clock, as follows:
the number of clock cycles = specified value of timing period (counted in fractions as a whole
number)
Data out hold time toh is 1.8 ns for PC133 components with no termination and 0 pF load.
with twr = 1 CLK for operations at less or equal 83 MHz will be available.
CLOCK
INPUT
OUTPUT
t
T
is longer than 1 ns, a time (
t
SETUP
t
HOLD
t
LZ
t
AC
1.4 V
t
CL
t
T
t
t
OH
CH
t
T
1) ns has to be added to this parameter.
t
t
AC
HZ
2.4 V
0.4 V
SPT03404
19
t
T
1.4 V
/2
0.5) ns has to be added to this parameter.
128-MBit Synchronous DRAM
HYB 39S128400/800/160CT(L)
Measurement conditions for
I/O
t
AC
and
t
50 pF
OH
9.01

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