MT45W256KW16BEGB-708 WT Micron Technology Inc, MT45W256KW16BEGB-708 WT Datasheet - Page 34

MT45W256KW16BEGB-708 WT

Manufacturer Part Number
MT45W256KW16BEGB-708 WT
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT45W256KW16BEGB-708 WT

Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Table 11:
PDF: 09005aef8329f3e3 / Source: 09005aef82e419a5
8mb_4mb_burst_cr1_0_p22z__2.fm - Rev. B 4/ 08 EN
Parameter
Burst to READ access time
CLK to output delay
Burst OE# LOW to output delay
CE# HIGH between subsequent burst and
mixed-mode operations
Maximum CE# pulse width
CE# LOW to WAIT valid
CLK period
CE# setup time to active CLK edge
Hold time from active CLK edge
Chip disable to DQ and WAIT High-Z output
CLK rise or fall time
CLK to WAIT valid
Output HOLD from CLK
CLK HIGH or LOW time
Output disable to DQ High-Z output
Output enable to Low-Z output
Setup time to active CLK edge
1
Burst READ Cycle Timing Requirements
Notes:
1. All tests are performed with the outputs configured for full-drive strength (BCR[5] = 0b).
2. When configured for synchronous mode (BCR[15] = 0), a refresh opportunity must be pro-
3. Low-Z to High-Z timings are tested with the circuit shown in Figure 27 on page 32. The
4. High-Z to Low-Z timings are tested with the circuit shown in Figure 27 on page 32. The
vided every
tions: clocked CE# HIGH or CE# HIGH for greater than 15ns.
High-Z timings measure a 100mV transition either from V
Low-Z timings measure a 100mV transition away from the High-Z (V
toward V
4Mb: 256K x 16 Async/Page/Burst CellularRAM 1.0 Memory
OH
t
or V
CEM. A refresh opportunity is satisfied by either of the following two condi-
Symbol
t
t
t
t
OL
t
t
t
t
t
ACLK
t
CBPH
KHKL
t
KHTL
t
t
CEM
CEW
KOH
ABA
t
OHZ
BOE
t
t
CLK
OLZ
CSP
t
HD
HZ
KP
SP
.
Min
9.62
34
5
1
3
2
2
3
3
3
104 MHz
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Max
35.9
7.5
1.6
20
7
8
8
7
8
Min
12.5
4.5
5
1
2
2
4
3
3
80 MHz
OH
or V
Timing Requirements
Max
46.5
©2008 Micron Technology, Inc. All rights reserved.
7.5
1.8
20
OL
9
8
8
9
8
toward V
CC
Q/2) level either
Unit
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CC
Q/2.
Notes
2
3
3
4

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