EP3C5F256C8N Altera, EP3C5F256C8N Datasheet - Page 201

• Manufacturer Part Number: EP3C5F256C8N
• Description: IC CYCLONE III FPGA 5K 256-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C5F256C8N

• Number Of Logic Elements/cells: 5136
• Number Of Labs/clbs: 321
• Total Ram Bits: 423936
• Number Of I /o: 182
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-FBGA
• No. Of Logic Blocks: 321
• Family Type: Cyclone III
• No. Of I/o's: 182
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 402MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2423; EP3C5F256C8N

Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration Features
© December 2009
Altera Corporation
Figure 9–18
cable.
Figure 9–18. PS Configuration Using a USB-Blaster, MasterBlaster, ByteBlaster II, ByteBlasterMV, or
Ethernet Blaster Cable
Notes to
(1) The pull-up resistor must be connected to the same supply voltage as the V
(2) You only need the pull-up resistors on DATA[0] and DCLK if the download cable is the only configuration scheme
(3) Pin 6 of the header is a V
(4) The nCEO pin is left unconnected or used as a user I/O pin when it does not feed the nCE pin of another device.
(5) The MSEL pin settings vary for different configuration voltage standards and POR time. To connect MSEL[3..0],
(6) Power up the V
You can use a download cable to configure multiple Cyclone III device family by
connecting the nCEO pin of each device to the nCE pin of the subsequent device. The
nCE pin of the first device is connected to GND while its nCEO pin is connected to the
nCE pin of the next device in the chain. The nCE input of the last device comes from
the previous device while its nCEO pin is left floating. All other configuration pins,
nCONFIG, nSTATUS, DCLK, DATA[0], and CONF_DONE are connected to every device
in the chain. Because all CONF_DONE pins are tied together, all devices in the chain
initialize and enter user mode at the same time.
In addition, the entire chain halts configuration if any device detects an error because
the nSTATUS pins are tied together. The Auto-restart configuration after error option
does not affect the configuration cycle because you must manually restart
configuration in the Quartus II software when an error occurs.
used on your board. This is to ensure that DATA[0] and DCLK are not left floating after configuration. For example,
if you are also using a configuration device, you do not need the pull-up resistors on DATA[0] and DCLK.
device. For this value, refer to the
ByteBlaster II, ByteBlaster MV, and Ethernet Blaster, this pin is a no connect.
refer to
Third-party programmers must switch to 2.5 V. Pin 4 of the header is a V
The MasterBlaster cable can receive power from either 5.0- or 3.3-V circuit boards, DC power supply, or 5.0 V from
the USB cable. For this value, refer to the
10kΩ
(2)
V
Figure
CCA
Table 9–7 on page 9–11
(1)
shows PS configuration for Cyclone III device family using a download
9–18:
(2)
V
CCA
CC
of the ByteBlaster II, USB-Blaster, or ByteBlasterMV cable with a 2.5- V supply from V
(1)
10
V
CCA
kΩ
IO
(1)
10kΩ
reference voltage for the MasterBlaster output driver. V
GND
for PS configuration schemes. Connect the MSEL pins directly to V
MasterBlaster Serial/USB Communications Cable User
Cyclone III Device Family
MSEL[3..0] (5)
nCE
DCLK
DATA[0]
nCONFIG
MasterBlaster Serial/USB Communications Cable User
CONF_DONE
nSTATUS
nCEO
N.C. (4)
V
CCA
CC
power supply for the MasterBlaster cable.
10kΩ
(1)
Cyclone III Device Handbook, Volume 1
CCA
V
supply.
CCA
IO
10kΩ
(1)
Download Cable 10-Pin Male
must match the V
Pin 1
Guide. For the USB Blaster,
Header (Top View)
Shield
GND
Guide.
V
CCA
V
CCA
IO
CCA
(6)
or GND.
(3)
CCA
GND
of the
.
9–41