EP4CGX150CF23I7 Altera, EP4CGX150CF23I7 Datasheet - Page 417
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EP4CGX150CF23I7
Manufacturer Part Number
EP4CGX150CF23I7
Description
IC CYCLONE IV FPGA 150K 484FBGA
Manufacturer
Altera
Series
CYCLONE® IV GXr
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CGX150CF23I7
Number Of Logic Elements/cells
149760
Number Of Labs/clbs
9360
Total Ram Bits
6480000
Number Of I /o
270
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4CGX150CF23I7
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP4CGX150CF23I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- EP4CGX15BN11C8N PDF datasheet
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Chapter 3: Cyclone IV Dynamic Reconfiguration
Dynamic Reconfiguration Modes
Figure 3–11. Option 1 for Transmitter Core Clocking (Channel Reconfiguration Mode)
© December 2010 Altera Corporation
FPGA Fabric
tx_clkout[0]
Low-speed parallel clock (tx_clkout0)
High-speed serial clock generated by the MPLL
Figure 3–11
channels of a transceiver block.
Option 2: Use the Respective Channel Transmitter Core Clocks
■
■
Enable this option if you want the individual transmitter channel tx_clkout
signals to provide the write clock to their respective Transmit Phase Compensation
FIFOs.
This option is typically enabled when each transceiver channel is reconfigured to a
different functional mode using channel reconfiguration.
shows the sharing of channel 0’s tx_clkout between all four regular
Transceiver Block
RX0
RX1
RX2
RX3
TX0
TX1
TX2
TX3
Cyclone IV Device Handbook, Volume 2
MPLL
3–27
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