EP1S80B956C7N Altera, EP1S80B956C7N Datasheet - Page 600
EP1S80B956C7N
Manufacturer Part Number
EP1S80B956C7N
Description
IC STRATIX FPGA 80K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S80B956C7N
Number Of Logic Elements/cells
79040
Number Of Labs/clbs
7904
Total Ram Bits
7427520
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Finite Impulse Response (FIR) Filters
7–22
Stratix Device Handbook, Volume 2
clock, the users needs to load coefficients of the polyphase filter h
so on.
output, y(n), is clocked using the 4 clock.
Table 7–10. Polyphase Interpolation (I=4) Filter Coefficient Loading
Schedule
Cycle of 4 Clock
Table 7–10
1, 5,...
2, 6,...
3, 7,...
4, 8,...
summarizes the coefficient loading schedule. The
h(2), h(6), h(10), h(14)
h(3), h(7), h(11), h(15)
h(0), h(4), h(8), h(12)
h(1), h(5), h(9), h(13)
Coefficients to Load
Corresponding RAM/ROM
Altera Corporation
0, 1, 2, 3
0, 1, 2, 3
0, 1, 2, 3
0, 1, 2, 3
September 2004
1
(n) and
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