FMS7401LEN Fairchild Semiconductor, FMS7401LEN Datasheet - Page 16

IC CTRLR POWER DGTL EEPROM 8DIP

FMS7401LEN

Manufacturer Part Number
FMS7401LEN
Description
IC CTRLR POWER DGTL EEPROM 8DIP
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FMS7401LEN

Applications
Digital Power Controller
Core Processor
8-Bit
Program Memory Type
EEPROM (1 kB)
Ram Size
64 x 8
Number Of I /o
6
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-
Controller Series
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
FMS7401LEN_NL
FMS7401LEN_NL

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FMS7401LEN14
Manufacturer:
Rohm
Quantity:
21 626
FMS7401L
PRODUCT SPECIFICATION
4
ADC Circuit
The Analog-to-Digital Converter (ADC) Circuit extends the features of the FMS7401L by offering a 5-channel 8-bit ADC. The
ADC may be programmed to convert voltages on any of the eight inputs of the analog mux, where five are multifunction input
channels (ACH1-ACH5) and three are used for system calibration. The integrated ADC function offers a single cost-effective
solution for applications requiring voltage, current and temperature sensing. The multifunction input channels may be config-
ured to perform standard conversions on any of the analog input pins (G4/AIN0, G3/AIN1, G2/AIN2, G3/AIN3 or G7/AIN4).
Three of the multifunction input channels may be programmed to perform ADC conversions through the internal Autozero
Amplifier, Uncommitted Amplifier, and Current Source Generator for special control system and battery management applica-
tions (see
Figure
6).
The ADC Circuit’s eight analog inputs are software selectable where their analog input voltage is converted with respect to the
internal ADC reference voltage (V
). V
may be programmed to use the internal bandgap reference voltage (V
) or
AREF
AREF
REF
1
Vcc as its source. By default, the ADC circuit’s V
is configured to use the internal V
as its source.
AREF
REF
The ADC performs conversions of 8-bit resolution with accuracy as defined in the
Electrical Characteristics
section of the
datasheet. For a standard ADC conversion, the ADC circuit converts the analog input voltage in a total of 13 conversion clock
cycles, and a total of 20 conversion clock cycles when performing an autozero ADC conversion. To yield a better ADC conver-
sion accuracy, the ADC circuit may configure the ADC clock (F
) to a slower frequency, lengthening the total conversion
ADCLK
time while improving its accuracy. As part of the total conversion time, the ADC circuit completes a sample and hold phase to
measure fast changing analog signals before converting the voltage. An ADC conversion can be initiated by a software com-
mand or automatically (using the gated auto-sampling mode) by the active (on) edge transition of the ADSTROBE PWM
2
Timer 1 output.
If enabled, the ADC circuit offers the use of its microcontroller hardware interrupt (ADCI) triggered after
each completed ADC conversion so that the microcontroller core is freed to perform other tasks.
4.1
ADC Circuit Configuration
3
Software must access the three memory mapped ADC registers to configure and control the ADC circuit.
The ADC Control 1
(ADCNTRL1) register is used to select the analog input channel and ADC reference voltage (V
) for the conversion. In
AREF
addition, it is used to initiate a conversion through software, monitor the ADC pending flag, and enable the ADC circuit’s
microcontroller hardware interrupt (ADCI). The ADC Control 2 (ADCNTRL2) register is used to enable the internal Autozero
Amplifier, Uncommitted Amplifier, Current Source Generator, and/or ADC Auto-sampling Mode. The ADCNTRL2 register is
also used to divide the ADC F
clock to improve the conversion accuracy. Lastly, the ADC Data (ADATA) register is used
ADCLK
by software to read the final converted 8-bit digital value. ADATA is a read only register and is updated automatically at the end
of each ADC conversion.
16
REV. 1.0.3 1/24/05

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