MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 374

• Manufacturer Part Number: MC68030RC40C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC40C

• Processor Type: M680x0 32-Bit
• Speed: 40MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 40MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

MOTOROLA
tables is added, at a minimum of 8K bytes per task, the total comes to over
format table descriptor that points to a lower level page table. Each page
table maps as many as 16 Mbytes of virtual address space. Since the upper
The average task for this system is a compiler or text editor that requires
only 192K bytes of memory, or 24 8K-byte pages. Using short page descrip-
tors, the page table occupies 96 bytes.
can provide the area needed without requiring excess space. This results in
an address table area small enough to be completely resident in physical
The paging hardware of many computer systems requires lower level tables
to reside at page boundaries, effectively using one or more entire pages.
This requires 80K bytes for the page tables for 10 tasks (10 tables, one 8K-
dresses. This results in a dramatic savings of memory for address table space;
8K-byte page per table), the MC68030 needs 960 bytes. Instead of 8K bytes
The translation table tree for the example system consists of two levels. The
the task. When the system dispatches a new task, it loads a pointer to the
descriptor for
that requires more than 16 Mbytes uses more than one valid entry in the
Page tables can reside at any 16-byte boundary; the limit fields of the MMU
memory. The operating system does not need to page the table areas.
byte page per table). Then, when the memory required for an upper level of
160K bytes. Table base addresses in the MC68030 are zero modulo 16 ad-
instead of using 80K bytes for the page tables for 10 tasks, (10 tables, one
per task for the upper level of tables, the tables require 2560 bytes in the
MC68030. The fragmentation that may occur in allocating smaller tables could
increasethe memory requirement but would still remain less than 160K bytes.
upper level is a fixed table that contains 32 entries, each of which is a long-
level table is small (256 bytes), it can easily fit in the main control block of
upper level table for the task into the CRP register. Each lower level table
consists of 0-2048 short-format page descriptors. The limit entry in the table
entry points to a lower level table with an average size of 96 bytes. A task
higher level table.
192K-byte task, the upper level table usually has one valid entry, and this
a page
table determines the size of the
MC68030 USER'S MANUAL
table.
For the
average
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