MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 505

• Manufacturer Part Number: MC68030RC40C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC40C

• Processor Type: M680x0 32-Bit
• Speed: 40MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 40MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

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11-42
11.6.9 Immediate Arithmetical/Logical Instructions
the specified destination addressing mode. Footnotes indicate when to ac-
times. For instruction-cache case and for no-cache case, the total number of
write cycles is given inside the parentheses as (r/p/w). The read, prefetch,
All timing data assumes two-clock reads and writes.
The immediate arithmeticaHogical operation timing table indicates the num-
count for the appropriate fetch effective or fetch immediate effective address
clock cycles is outside the parentheses. The number of read, prefetch, and
and write cycles are included in the total clock cycle number.
**Add Fetch Immediate Effective Address Time
ber of clock periods needed for the processor to fetch the source immediate
data value and to perform the specified arithmetic/logical operation using
~*
**
~'*'
**
~*'
~*
~*
~*
~*'
~*
~*
**
*Add Fetch Effective Address Time
ADDQ
ADDQ
ADDI
ANDI
ANDI
MOVEQ '
SUBQ
SUBQ
EORI
E O R I
ORI
ORI
C M P I
ADDt
SUBI
SUBI
CMPI
Instruction
#(data),Dn
#<data),Rn
#(data),Mem
#<data>,Rn
#<data),Mem
#(data),Dn
#(data),Mem
#(data),Dn
#(data~,Mem
#(data),Dn
#<data),Mem
#(data),Dn
#(data),Mem
#(data),Dn
#<data),Mem
#<data),Mem
#(data),On
MC68030 USER'S MANUAL
Head
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2
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2
0
2
0
2
2
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Tail
0
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I-Cache Case
2(0/0/0)
3(0/0/1)
3(0/0/1)
3(0/0/1)
31o/o/1)
2(0/0/0)
2(0/0/0)
3(0/0/1)
2(0/0/0)
2(0/0/0)
2(0/0/0)
2(0/0/0)
2(0/0/0)
2(0/0/0)
2(0/0/0)
3(0/0/1)
3(0/0/1)
No-Cache Case
MOTOROLA
2(0/1/0)
2(0/1/0)
4(o/1/1)
2(0/1/0)
2(0/1/0)
2(0/1/0)
4(0/1/1)
2(0/1/0)
4(0/1/1)
2(0/1/0)
4(0/1/1)
2(0/1/0)
4(0/1/1)
4(0/1/1)
2(0/1/0)
4(0/1/1)
2(0/1/0)