MC68030CRC33C Freescale Semiconductor, MC68030CRC33C Datasheet - Page 401
MC68030CRC33C
Manufacturer Part Number
MC68030CRC33C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Specifications of MC68030CRC33C
Processor Type
M680x0 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
33MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
128
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
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10
10-14
10.2.2.1.1 Format.
the branch instruction format can include this information in extension words.
termined by the coprocessor design. The final word(s) of the cpBcc instruction
format contains the displacement used by the main processor to calculate
the destination address when the branch is taken.
The first word of the branch on coprocessor condition instruction is the
fication code of the coprocessor that is to evaluate the condition. The value
in bits [8:6] identifies either the word or the long-word displacement format
of the branch instruction, which is specified by the cpBcc.W or cpBcc.L mne-
selector field. The MC68030 writes the entire operation word to the condition
CIR to initiate execution of the branch instruction by the coprocessor. The
coprocessor uses bits [0-5] to determine which condition to evaluate.
If the coprocessor requires additional information to evaluate the condition,
F-line operation word. Bits [15:12]=1111 and bits [11:9] contain the identi-
monic, respectively.
Bits [0-5] of the F-line operation word contain the coprocessor condition
Following the F-line operation word, the number of extension words is de-
condition instruction that provides a word-length displacement. Figure
ment.
10-10 shows the format of the instruction that includes a long-word displace-
15
15
'
1 I 1 I I I 1 I
Figure 10-10. Branch On Coprocessor Condition Instruction (cpBcc.L)
Figure 10-9. Branch on Coprocessor Condition Instruction (cpBcc.W)
I ' I1 I '
14
14
13
13
Figure 10-9 shows the format of the branch on coprocessor
12
12 11
I
OPTIONAL COPROCESSOR-DEFI N ED EXTENSION WORDS
OPTIONAL COPROCESSOR-DEFI N ED EXTENSION WORDS
11
MC68030 USER'S MANUAL
Cpl O
cp,0
DISPLACEMENT -- HIGH
DISPLACEMENT -- LOW
9
9
DISPLACEMENT
I 0
8
8
I
I 1
I
7
7
I'
I 0
0
6
B
I
I
5
5
CONO,T, ON SE'ECTO,
CONDITION SELECTOR
MOTOROLA
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