MC68030CRC33C Freescale Semiconductor, MC68030CRC33C Datasheet - Page 508

• Manufacturer Part Number: MC68030CRC33C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030CRC33C

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

11.6.12 Shift/Rotate Instructions
M O T O R O L A
t h e t o t a l n u m b e r
T h e s h i f t / r o t a t e i n s t r u c t i o n t a b l e i n d i c a t e s t h e n u m b e r o f c l o c k p e r i o d s n e e d e d
f o r t h e p r o c e s s o r t o p e r f o r m t h e s p e c i f i e d o p e r a t i o n o n t h e g i v e n a d d r e s s i n g
c u t i o n t i m e , u n l e s s n o t e d . F o r i n s t r u c t i o n - c a c h e
T h e r e a d , p r e f e t c h ,
All timing data assumes two-clock reads and writes.
m o d e . F o o t n o t e s i n d i c a t e w h e n it is n e c e s s a r y t o a c c o u n t f o r t h e a p p r o p r i a t e
e f f e c t i v e a d d r e s s t i m e . T h e n u m b e r o f b i t s s h i f t e d d o e s n o t a f f e c t t h e e x e -
r e a d , p r e f e t c h , a n d w r i t e c y c l e s is g i v e n
n u m b e r .
%
*
*
%
*
*
*
+
+
Add Fetch Effective Address Time
Direction of shift/rotate; L or R
Indicates shift count is less than or equal to the size of data
Indicates shift count
ASL
ASL
ASL
ASR
ASR
ASR
ASR
LSd
LSd
LSd
LSd
ROd
ROd
ROd
ROXd
ROXd
Instruction
#(data},Dy
#<data>,Dy
#<data>,Dy
Dx,Dy
Dx,Dy
Mem by 1
Mem by 1
#<data>,Dy
Dx,Dy
Dx,Dy
Mem by 1
Dx,Dy
Mem by 1
Dn
Mere by 1
Dx,Dy
is greater than size of data
o f c l o c k c y c l e s is o u t s i d e t h e p a r e n t h e s e s .
a n d w r i t e c y c l e s a r e i n c l u d e d
M 0 6 8 0 3 0 U S E R ' S M A N U A L
Head
10
10
4
6
8
0
2
4
0
4
6
0
4
6
0
0
i n s i d e t h e p a r e n t h e s e s as ( r / p / w ) .
Tail
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
c a s e a n d f o r n o - c a c h e case,
in t h e t o t a l c l o c k c y c l e
I-CacheCase No-Cache Case
10(0/0/0)
12(0/0/0)
4(0/0/0)
4(0/0/0)
6(0/0/0)
8(0/0/0)
4(0/0/1)
6(0/0/0)
8(0/0/0)
6(0/0/1)
4(0/0/0)
6(0/0/0)
4(0/0/1)
6(0/0/0)
8(0/0/0)
6(0/0/1)
T h e n u m b e r o f
10(0/1/0)
12(0/1/0)
4(0/1/0)
6(0/1/0)
8(0/1/0)
4(0/1/1)
6(0/1/0)
8(0/1/0)
6(0/1/1)
4(0/1/0)
4(0/1/1)
6(0/1/0)
8(0/1/0)
6(0/1/1)
4(0/1/0)
6(0/1/0)
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