MC68LC060RC66 Freescale Semiconductor, MC68LC060RC66 Datasheet - Page 193
MC68LC060RC66
Manufacturer Part Number
MC68LC060RC66
Description
IC MPU 32BIT 66MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68060RC50.pdf
(416 pages)
Specifications of MC68LC060RC66
Processor Type
M680x0 32-Bit
Speed
66MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
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Bus Operation
7.8.2.1 LPSTOP BROADCAST CYCLE. The execution of an LPSTOP instruction gener-
ates the LPSTOP broadcast cycle. This access is a write bus cycle and is indicated with
TT1, TT0 = $3, A31–A0 = $FFFFFFFE, and TM2–TM0 = $0. When an external device ter-
minates the cycle with either TA or TEA, the processor enters the low-power stop mode. A
7-38
Figure 7-29. Autovector Interrupt Acknowledge Bus Cycle Timing
MISCELLANEOUS
ATTRIBUTES
UPA1–UPA0
TM2–TM0
SIZ1–SIZ0
TT1–TT0
BS2–BS0
A31–A0
CIOUT
D31–D0
BCLK
AVEC
R/W
BS3
SAS
TIP
TA
TS
AUTOVECTORED
ACKNOWLEDGE
C1
INTERRUPT
M68060 USER’S MANUAL
INTERRUPT LEVEL
BYTE
C2
C1
WRITE STACK
C2
MOTOROLA
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