MC68LC060RC66 Freescale Semiconductor, MC68LC060RC66 Datasheet - Page 264
MC68LC060RC66
Manufacturer Part Number
MC68LC060RC66
Description
IC MPU 32BIT 66MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68060RC50.pdf
(416 pages)
Specifications of MC68LC060RC66
Processor Type
M680x0 32-Bit
Speed
66MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
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9.1.2 JTAG Instruction Shift Register
The MC68060 IEEE 1149.1 implementation uses a 4-bit instruction shift register without par-
ity. The shift register transfers its value to a parallel hold register and applies one of sixteen
possible instructions, seven of which are defined as public customer-usable instructions, on
the falling edge of TCK when the TAP state machine is in the update-IR state (the other nine
instructions are private instructions to support manufacturing test and can cause destructive
behavior if used without proper understanding). The instructions may be loaded into the shift
portion of the register by placing the serial data on the TDI signal prior to each rising edge
of TCK. The most significant bit of the instruction shift register is the bit closest to the TDI
signal and the least significant bit is the bit closest to the TDO pin.
The public customer-usable instructions that are supported are listed with their encodings in
Table 9-2.
MOTOROLA
TRST
TMS
TCK
TDI
31
3
213
1-BIT BYPASS
32-BIT IDCODE REGISTER
Figure 9-1. JTAG Test Logic Block Diagram
TAP CONTROLLER
214-BIT BOUNDARY SCAN REGISTER
4-BIT INSTRUCTION SHIFT REGISTER
0
INSTRUCTION APPLY & DECODE REGISTER
M68060 USER’S MANUAL
IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
0
0
0
M
U
X
TDO
9-3
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