MC68LC060RC66 Freescale Semiconductor, MC68LC060RC66 Datasheet - Page 321

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MC68LC060RC66

Manufacturer Part Number
MC68LC060RC66
Description
IC MPU 32BIT 66MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68LC060RC66

Processor Type
M680x0 32-Bit
Speed
66MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68LC060RC66
Manufacturer:
M/A-COM
Quantity:
101
FSGLDIV
FSGLMUL
FMOVEM
,FPx *
FMOVEM
FPy, *
FMUL
FDMUL
FSMUL
FNEG
FDNEG
FSNEG
FSUB
FDSUB
FSSUB
FTST
FSQRT
FSSQRT
FDSQRT
FSAVE
FRE-
STORE
FMOVEM
,FPxR
FMOVEM
FPxR,
Instruction
NOTES:
MOTOROLA
“n” is the number of registers being moved.
For all FPU operations, if the external operand format is byte, word, or long, add three cycles to the execution time.
*For all FPU operations except FMOVEM, if the external operand format is extended precision, add two cycles to the
execution time.
Add 2(1/0) cycles to the (bd,An,Xi*SF) time for a memory indirect address.
Add 1(0/0) cycle if the <ea> specifies a double precision immediate operand.
Table 10-25. Floating-Point Instruction Execution Times (Continued)
37(0/0) 39(0/0) 37(1/0) 37(1/0) 37(1/0)
68(0/0) 70(0/0) 68(1/0) 68(1/0) 68(1/0)
68(0/0) 70(0/0) 68(1/0) 68(1/0) 68(1/0)
68(0/0) 70(0/0) 68(1/0) 68(1/0) 68(1/0)
3(0/0)
3(0/0)
3(0/0)
3(0/0)
1(0/0)
1(0/0)
1(0/0)
3(0/0)
3(0/0)
3(0/0)
1(0/0)
FPn
5(0/0)
5(0/0)
5(0/0)
5(0/0)
3(0/0)
3(0/0)
3(0/0)
5(0/0)
5(0/0)
5(0/0)
3(0/0)
Dn
3(1/0)
(3n/0)
(0/3n)
3(1/0)
3(1/0)
3(1/0)
1(1/0)
1(1/0)
1(1/0)
3(1/0)
3(1/0)
3(1/0)
1(1/0)
3(0/3)
6(3/0)
7(n/0)
5(0/n)
1+3n
1+3n
(An)
(An)+
(3n/0)
3(1/0)
3(1/0)
3(1/0)
1(1/0)
1(1/0)
1(1/0)
3(1/0)
3(1/0)
3(1/0)
1(1/0)
3(1/0)
1+3n
M68060 USER’S MANUAL
(0/3n)
–(An)
3(1/0)
3(1/0)
3(1/0)
3(1/0)
1(1/0)
1(1/0)
1(1/0)
3(1/0)
3(1/0)
3(1/0)
1(1/0)
1+3n
Effective Address, <ea>
1+3n(3n/0)
1+3n(0/3n)
(d16,An)
(d16,PC)
37(1/0)
68(1/0)
68(1/0)
68(1/0)
3(1/0)
3(1/0)
3(1/0)
3(1/0)
1(1/0)
1(1/0)
1(1/0)
3(1/0)
3(1/0)
3(1/0)
1(1/0)
(d8,PC,Xi SF)
(d8,An,Xi SF)
2+3n(3n/0)
2+3n(0/3n)
38(1/0)
69(1/0)
69(1/0)
69(1/0)
4(1/0)
4(1/0)
4(1/0)
4(1/0)
2(1/0)
2(1/0)
2(1/0)
4(1/0)
4(1/0)
4(1/0)
2(1/0)
(bd,An,XI SF)
(bd,PC,XI SF)
Instruction Execution Timing
3+3n(3n/0)
3+3n(0/3n)
39(1/0)
70(1/0)
70(1/0)
70(1/0)
5(1/0)
5(1/0)
5(1/0)
5(1/0)
3(1/0)
3(1/0)
3(1/0)
5(1/0)
5(1/0)
5(1/0)
3(1/0)
(xxx).WL #<imm>
2+3n(3n/
2+3n(0/
38(1/0)
69(1/0)
69(1/0)
69(1/0)
4(1/0)
4(1/0)
4(1/0)
4(1/0)
2(1/0)
2(1/0)
2(1/0)
4(1/0)
4(1/0)
4(1/0)
2(1/0)
3n)
0)
38(0/0)
69(0/0)
69(0/0)
69(0/0)
4(0/0)
4(0/0)
4(0/0)
4(0/0)
2(0/0)
2(0/0)
2(0/0)
3(0/0)
3(0/0)
3(0/0)
1(0/0)
10-25

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