ENC624J600-I/PT Microchip Technology, ENC624J600-I/PT Datasheet - Page 120

• Manufacturer Part Number: ENC624J600-I/PT
• Description: IC ETHERNET CTRLR W/SPI 64-TQFP
• Manufacturer: Microchip Technology

Specifications of ENC624J600-I/PT

• Package / Case: 64-TFQFP
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ENC424J600/624J600
REGISTER 13-1:
DS39935C-page 118
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-7
bit 6
bit 5
bit 4
bit 3
bit 2
CRYPTEN
R/W-0
R/W-0
r
CRYPTEN: Modular Exponentiation and AES Cryptographic Modules Enable bit
1 = All cryptographic engine modules are enabled
0 = Modular exponentiation and AES modules are disabled and powered down; MD5/SHA-1 hashing
MODEXIF: Modular Exponentiation Interrupt Flag bit
1 = Modular exponentiation calculation is complete
0 = No interrupt pending
HASHIF: MD5/SHA-1 Hash Interrupt Flag bit
1 = MD5/SHA-1 hash operation is complete
0 = No interrupt pending
AESIF: AES Encrypt/Decrypt Interrupt Flag bit
1 = AES encrypt/decrypt operation is complete
0 = No interrupt pending
LINKIF: PHY Link Status Change Interrupt Flag bit
1 = PHY Ethernet link status has changed. Read PHYLNK (ESTAT<8>) to determine the current state.
0 = No interrupt pending
Reserved: Ignore on read, don’t care on write
PKTIF: RX Packet Pending Interrupt Flag bit
1 = One or more RX packets have been saved and are ready for software processing. The
0 = No RX packets are pending
DMAIF: DMA Interrupt Flag bit
1 = DMA copy or checksum operation is complete
0 = No interrupt pending
Reserved: Ignore on read, don’t care on write
TXIF: Transmit Done Interrupt Flag bit
1 = Packet transmission has completed. TXRTS (ECON1<1>) has been cleared by hardware.
0 = No interrupt pending
TXABTIF: Transmit Abort Interrupt Flag bit
1 = Packet transmission has been aborted due to an error. Read the ETXSTAT register to determine
0 = No interrupt pending
MODEXIF
R/W-0
PKTIF
is still available
PKTCNT<7:0> (ESTAT<7:0>) bits are non-zero. To clear this flag, decrement the PKTCNT bits to
zero by setting PKTDEC (ECON1<8>).
the cause. TXRTS (ECON1<1>) has been cleared by hardware.
R-0
EIR: ETHERNET INTERRUPT FLAG REGISTER
W = Writable bit
‘1’ = Bit is set
HASHIF
DMAIF
R/W-0
R/W-0
AESIF
R/W-0
R-0
r
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
LINKIF
R/W-1
R/W-0
TXIF
TXABTIF
R/W-0
R/W-0
r
 2010 Microchip Technology Inc.
x = Bit is unknown
RXABTIF
R/W-1
R/W-0
r
PCFULIF
R/W-0
R/W-0
r
bit 8
bit 0