ENC624J600-I/PT Microchip Technology, ENC624J600-I/PT Datasheet - Page 23

• Manufacturer Part Number: ENC624J600-I/PT
• Description: IC ETHERNET CTRLR W/SPI 64-TQFP
• Manufacturer: Microchip Technology

Specifications of ENC624J600-I/PT

• Package / Case: 64-TFQFP
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.2.4
When using a PSP interface, the SFR memory is linear;
all registers are directly accessible without banking. To
maintain consistency with the SPI interface, the
EUDAST, EUDAND, ESTAT, EIR and ECON1 registers
are instantiated in four locations in the PSP memory
maps. Users may opt to use any one of these four
locations.
TABLE 3-2:
 2010 Microchip Technology Inc.
7E0A
7E0B
7E0C
7E0D
7E0E
7E1A
7E1B
7E1C
7E1D
7E1E
Addr
7E00
7E01
7E02
7E03
7E04
7E05
7E06
7E07
7E08
7E09
7E0F
7E10
7E12
7E13
7E14
7E15
7E16
7E17
7E18
7E19
7E1F
7E11
ERXHEADH
EDMALENH
EDMADSTH
ERXHEADL
EDMALENL
EDMADSTL
ETXWIREH
ETXSTATH
ETXWIREL
EDMASTH
EDMACSH
ETXSTATL
EUDANDH
ERXTAILH
EDMASTL
EDMACSL
EUDASTH
EUDANDL
ETXLENH
ERXTAILL
EUDASTL
ETXLENL
ECON1H
ERXSTH
ECON1L
ETXSTH
ERXSTL
ETXSTL
ESTATH
ESTATL
Name
PSP REGISTER MAP
EIRH
EIRL
ENC424J600/624J600 SFR MAP (BASE REGISTER MAP, 8-BIT PSP INTERFACE)
7E2A
7E2B
7E2C
7E2D
7E2E
7E3A
7E3B
7E3C
7E3D
7E3E
Addr
7E20
7E21
7E22
7E23
7E24
7E25
7E26
7E27
7E28
7E29
7E2F
7E30
7E31
7E32
7E33
7E34
7E35
7E36
7E37
7E38
7E39
7E3F
ERXFCONH
ERXFCONL
EUDANDH
EUDASTH
EUDANDL
EUDASTL
EPMM1H
EPMM2H
EPMM3H
EPMM4H
EPMCSH
EPMM1L
EPMM2L
EPMM3L
EPMM4L
EPMCSL
ECON1H
ECON1L
EPMOH
ESTATH
ESTATL
EPMOL
EHT1H
EHT2H
EHT3H
EHT4H
EHT1L
EHT2L
EHT3L
EHT4L
Name
EIRH
EIRL
7E4A
7E4B
7E4C
7E4D
7E4E
7E5A
7E5B
7E5C
7E5D
7E5E
Addr
7E40
7E41
7E42
7E43
7E44
7E45
7E46
7E47
7E48
7E49
7E4F
7E50
7E51
7E52
7E53
7E54
7E55
7E56
7E57
7E58
7E59
7E5F
MIREGADRH
MIREGADRL
MACLCONH
MACLCONL
MABBIPGH
MACON1H
MACON2H
MABBIPGL
MAMXFLH
EUDANDH
MACON1L
MACON2L
MAMXFLL
EUDASTH
EUDANDL
EUDASTL
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
MICMDH
ECON1H
MAIPGH
MICMDL
ECON1L
MAIPGL
ESTATH
ESTATL
Name
EIRH
EIRL
ENC424J600/624J600
The SFR maps for the 8-bit and 16-bit PSP interfaces
are shown in Table 3-2 and Table 3-3, respectively.
7E6A
7E6B
7E6C
7E6D
7E6E
7E7A
7E7B
7E7C
7E7D
7E7E
Addr
7E60
7E61
7E62
7E63
7E64
7E65
7E66
7E67
7E68
7E69
7E6F
7E70
7E71
7E72
7E73
7E74
7E75
7E76
7E77
7E78
7E79
7E7F
MAADR3H
EUDANDH
MAADR2L
MAADR2H
MAADR1H
EUDASTH
EUDANDL
MAADR3L
MAADR1L
EUDASTL
ERXWMH
ERXWML
EIDLEDH
MISTATH
ECON2H
EIDLEDL
ECON1H
MISTATL
EPAUSH
EPAUSL
ECON2L
ECON1L
ESTATH
ESTATL
MIWRH
MIWRL
MIRDH
MIRDL
Name
EIEH
EIRH
EIRL
EIEL
7E8A
7E8B
7E8C
7E8D
7E8E
7E8F
7E9A
7E9B
7E9C
7E9D
7E9E
7E9F
Addr
7E80
7E81
7E82
7E83
7E84
7E85
7E86
7E87
7E88
7E89
7E90
7E91 EUDAWRPTH
7E92
7E93
7E94
7E95
7E96
7E97
7E98
7E99
DS39935C-page 21
EUDARDPTH
EUDAWRPTL
EUDARDPTL
EGPWRPTH
ERXWRPTH
EGPWRPTL
EGPRDPTH
ERXRDPTH
ERXWRPTL
EUDADATA
EGPRDPTL
ERXRDPTL
EGPDATA
ERXDATA
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
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