ENC624J600-I/PT Microchip Technology, ENC624J600-I/PT Datasheet - Page 80

IC ETHERNET CTRLR W/SPI 64-TQFP

ENC624J600-I/PT

Manufacturer Part Number
ENC624J600-I/PT
Description
IC ETHERNET CTRLR W/SPI 64-TQFP
Manufacturer
Microchip Technology
Datasheets

Specifications of ENC624J600-I/PT

Package / Case
64-TFQFP
Controller Type
Ethernet Controller
Interface
SPI
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
96mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Input Voltage Range (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
117 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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ENC624J600-I/PT
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Microchip Technology
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ENC424J600/624J600
REGISTER 8-1:
DS39935C-page 78
bit 6
bit 4
bit 3-2
bit 1-0
Note 1:
Reset value on POR events only. All other Resets leave these bits unchanged.
RXRST: Receive Logic Reset bit
1 = Receive logic is held in Reset. RXEN (ECON1<0>) is automatically cleared by hardware when this
0 = Receive logic is not in Reset (normal operation)
ETHRST: Master Ethernet Reset bit
1 = All TX, RX, MAC, PHY, DMA, modular exponentiation, hashing and AES logic, and registers
0 = Device is not in Reset (normal operation)
MODLEN<1:0>: Modular Exponentiation Length Control bits
11 = Reserved
10 = 1024-bit modulus and operands
01 = 768-bit modulus and operands
00 = 512-bit modulus and operands
AESLEN<1:0>: AES Key Length Control bits
11 = Reserved
10 = 256-bit key
01 = 192-bit key
00 = 128-bit key
bit is set.
(excluding COCON) are reset. Hardware self-clears this bit to ‘ 0 ’. After setting this bit, wait at least
25  s before attempting to read or write to the ENCX24J600 via the SPI or PSP interface.
ECON2: ETHERNET CONTROL REGISTER 2 (CONTINUED)
 2010 Microchip Technology Inc.

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