ENC624J600-I/PT Microchip Technology, ENC624J600-I/PT Datasheet - Page 137
![IC ETHERNET CTRLR W/SPI 64-TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
ENC624J600-I/PT
Manufacturer Part Number
ENC624J600-I/PT
Description
IC ETHERNET CTRLR W/SPI 64-TQFP
Manufacturer
Microchip Technology
Specifications of ENC624J600-I/PT
Package / Case
64-TFQFP
Controller Type
Ethernet Controller
Interface
SPI
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
96mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Input Voltage Range (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
117 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ENC624J600-I/PT
Manufacturer:
Microchip
Quantity:
3 200
Company:
Part Number:
ENC624J600-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
To encrypt a block using CTR mode:
1.
2.
3.
4.
5.
6.
7.
8.
2010 Microchip Technology Inc.
Load the encryption key as described in
Section 15.3.1 “Key Support” .
Set AESOP<1:0> (ECON1<10:9>) to ‘ 00 ’.
Copy the counter value to TEXTA at 7C20h.
Set AESST (ECON1<11>) to initiate the
encryption.
Copy the plaintext message to TEXTB at
7C30h.
Wait for the hardware to clear AESST.
Read the ciphertext message from XOROUT at
7C40h.
Repeat steps 3 through 7 for subsequent blocks.
ENC424J600/624J600
To decrypt a block using CTR mode:
1.
2.
3.
4.
5.
6.
7.
8.
The context for CTR mode consists of the AES encryp-
tion key and the counter value. It is up to the application
to determine what needs to be saved for the counter
value context.
Load the encryption key as described in
Section 15.3.1 “Key Support” . Note that this
mode does not make use of a decryption key.
Set AESOP<1:0> to ‘ 00 ’.
Copy the counter value to TEXTA at 7C20h.
Set AESST to initiate the encryption.
Copy the ciphertext message to TEXTB at
7C30h.
Wait for the hardware to clear AESST.
Read the plaintext message from XOROUT at
7C40h.
Repeat steps 3 through 7 for subsequent blocks.
DS39935C-page 135