PIC24HJ128GP510-I/PT Microchip Technology Inc., PIC24HJ128GP510-I/PT Datasheet - Page 215

• Manufacturer Part Number: PIC24HJ128GP510-I/PT
• Description: MCU, 16-Bit, 128KB Flash, 8KB RAM, 85 I/O, TQFP-100
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24HJ128GP510-I/PT

• A/d Inputs: 32 Channel, 12-Bit
• Cpu Speed: 40 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 85
• Interface: CAN/I2C/SPI/UART
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 85
• Number Of Pins: 100
• Package Type: 100-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 8K Bytes
• Speed: 40 MIPS
• Timers: 9-16-bit, 4-32-bit
• Voltage, Range: 3-3.6 V
• Voltage, Rating: 3-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 19-9:
REGISTER 19-10: ADxPCFGL: ADCx PORT CONFIGURATION REGISTER LOW
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1:
PCFG31
PCFG23
PCFG15
PCFG7
R/W-0
R/W-0
R/W-0
R/W-0
2:
2:
On devices without 32 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
ports without a corresponding input on device.
ADC2 only supports analog inputs AN0-AN15; therefore, no ADC2 high port Configuration register exists.
On devices without 16 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
ports without a corresponding input on device.
On devices with 2 analog-to-digital modules, both AD1PCFGL and AD2PCFGL will affect the configuration
of port pins multiplexed with AN0-AN15.
PCFG<31:16>: A/D Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, A/D input multiplexor connected to AV
0 = Port pin in Analog mode, port read input disabled, A/D samples pin voltage
PCFG<15:0>: A/D Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, A/D input multiplexor connected to AV
0 = Port pin in Analog mode, port read input disabled, A/D samples pin voltage
PCFG30
PCFG22
PCFG14
PCFG6
R/W-0
R/W-0
R/W-0
R/W-0
AD1PCFGH: ADC1 PORT CONFIGURATION REGISTER HIGH
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG29
PCFG21
PCFG13
PCFG5
R/W-0
R/W-0
R/W-0
R/W-0
PIC24HJXXXGPX06/X08/X10
PCFG28
PCFG20
PCFG12
PCFG4
R/W-0
R/W-0
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG27
PCFG19
PCFG11
PCFG3
R/W-0
R/W-0
R/W-0
R/W-0
PCFG26
PCFG18
PCFG10
PCFG2
R/W-0
R/W-0
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
PCFG25
PCFG17
PCFG9
PCFG1
R/W-0
R/W-0
R/W-0
R/W-0
(1,2)
(1,2)
DS70175F-page 213
PCFG24
PCFG16
PCFG8
PCFG0
R/W-0
R/W-0
SS
R/W-0
R/W-0
SS
bit 8
bit 0
bit 8
bit 0