PIC24HJ128GP510-I/PT Microchip Technology Inc., PIC24HJ128GP510-I/PT Datasheet - Page 55

• Manufacturer Part Number: PIC24HJ128GP510-I/PT
• Description: MCU, 16-Bit, 128KB Flash, 8KB RAM, 85 I/O, TQFP-100
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24HJ128GP510-I/PT

• A/d Inputs: 32 Channel, 12-Bit
• Cpu Speed: 40 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 85
• Interface: CAN/I2C/SPI/UART
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 85
• Number Of Pins: 100
• Package Type: 100-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 8K Bytes
• Speed: 40 MIPS
• Timers: 9-16-bit, 4-32-bit
• Voltage, Range: 3-3.6 V
• Voltage, Rating: 3-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

4.0
The PIC24HJXXXGPX06/X08/X10 devices contain
internal Flash program memory for storing and execut-
ing application code. The memory is readable, writable
and erasable during normal operation over the entire
V
Flash memory can be programmed in two ways:
1.
2.
ICSP
PIC24HJXXXGPX06/X08/X10 device to be serially
programmed while in the end application circuit. This is
simply done with two lines for programming clock and
programming data (one of the alternate programming
pin pairs: PGC1/PGD1, PGC2/PGD2 or PGC3/PGD3,
and three other lines for power (V
Master Clear (MCLR). This allows customers to manu-
facture boards with unprogrammed devices and then
program the digital signal controller just before shipping
FIGURE 4-1:
© 2007 Microchip Technology Inc.
DD
Note:
In-Circuit Serial Programming™ (ICSP™)
programming capability
Run-Time Self-Programming (RTSP)
range.
FLASH PROGRAM MEMORY
programming
This data sheet summarizes the features
of this group of PIC24HJXXXGPX06/X08/
X10 devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to the “PIC24H Family Reference
Manual”. Refer to the Microchip web site
(www.microchip.com)
PIC24H
sections.
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
ADDRESSING FOR TABLE REGISTERS
Family
capability
Reference
DD
), ground (V
for
1/0
0
the
allows
TBLPAG Reg
PIC24HJXXXGPX06/X08/X10
8 bits
Manual
SS
latest
) and
a
Program Counter
24-bit EA
24 bits
the product. This also allows the most recent firmware
or a custom firmware to be
programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
can write program memory data either in blocks or
‘rows’ of 64 instructions (192 bytes) at a time, or single
instructions and erase program memory in blocks or
‘pages’ of 512 instructions (1536 bytes) at a time.
4.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits<7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in Figure 4-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
Byte
Select
DS70175F-page 53