PIC24HJ128GP510-I/PT Microchip Technology Inc., PIC24HJ128GP510-I/PT Datasheet - Page 282

• Manufacturer Part Number: PIC24HJ128GP510-I/PT
• Description: MCU, 16-Bit, 128KB Flash, 8KB RAM, 85 I/O, TQFP-100
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24HJ128GP510-I/PT

• A/d Inputs: 32 Channel, 12-Bit
• Cpu Speed: 40 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 85
• Interface: CAN/I2C/SPI/UART
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 85
• Number Of Pins: 100
• Package Type: 100-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 8K Bytes
• Speed: 40 MIPS
• Timers: 9-16-bit, 4-32-bit
• Voltage, Range: 3-3.6 V
• Voltage, Rating: 3-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC24HJXXXGPX06/X08/X10
Reset
Reset Sequence.................................................................. 67
Resets ................................................................................. 59
S
Serial Peripheral Interface (SPI) ....................................... 147
Setup for Continuous Output Pulse Generation................ 143
Setup for Single Output Pulse Generation ........................ 143
Software Simulator (MPLAB SIM)..................................... 234
Software Stack Pointer, Frame Pointer
Special Features ............................................................... 217
SPI
SPI Module
Symbols Used in Opcode Descriptions............................. 226
System Control
T
Temperature and Voltage Specifications
Timer1 ............................................................................... 133
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 135
Timing Characteristics
Timing Diagrams
DS70175F-page 280
T1CON (Timer1 Control)........................................... 134
TxCON (T2CON, T4CON, T6CON or T8CON
TyCON (T3CON, T5CON, T7CON or T9CON
UxMODE (UARTx Mode) .......................................... 168
UxSTA (UARTx Status and Control) ......................... 170
Clock Source Selection ............................................... 63
Special Function Register Reset States ..................... 64
Times .......................................................................... 63
CALL Stack Frame...................................................... 47
Master, Frame Master Connection ........................... 149
Master/Slave Connection .......................................... 149
Slave, Frame Master Connection ............................. 150
Slave, Frame Slave Connection ............................... 150
Operating Function Description ................................ 147
SPI1 Register Map ...................................................... 35
SPI2 Register Map ...................................................... 35
Register Map............................................................... 46
AC ............................................................................. 245
CLKO and I/O ........................................................... 248
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0,
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0,
12-bit A/D Conversion (ASAM = 0, SSRC = 000) ..... 268
CAN I/O..................................................................... 264
ECAN Bit ................................................................... 178
External Clock ........................................................... 246
I2Cx Bus Data (Master Mode) .................................. 260
I2Cx Bus Data (Slave Mode) .................................... 262
I2Cx Bus Start/Stop Bits (Master Mode) ................... 260
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 262
Input Capture (CAPx)................................................ 253
OC/PWM ................................................................... 254
Output Compare (OCx) ............................................. 253
Reset, Watchdog Timer, Oscillator Start-up
SPIx Master Mode (CKE = 0).................................... 254
SPIx Master Mode (CKE = 1).................................... 255
SPIx Slave Mode (CKE = 0)...................................... 256
SPIx Slave Mode (CKE = 1)...................................... 258
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock............... 251
Control) ............................................................. 138
Control) ............................................................. 139
ASAM = 0, SSRC = 000) .................................. 270
ASAM = 1, SSRC = 111, SAMC = 00001)........ 271
Timer and Power-up Timer ............................... 249
Timing Requirements
Timing Specifications
U
UART
UART Module
V
Voltage Regulator (On-Chip) ............................................ 222
W
Watchdog Timer (WDT)............................................ 217, 223
WWW Address ................................................................. 283
WWW, On-Line Support ..................................................... 10
CLKO and I/O ........................................................... 248
External Clock........................................................... 246
Input Capture ............................................................ 253
10-bit A/D Conversion Requirements ....................... 272
12-bit A/D Conversion Requirements ....................... 269
CAN I/O Requirements ............................................. 264
I2Cx Bus Data Requirements (Master Mode)........... 261
I2Cx Bus Data Requirements (Slave Mode)............. 263
Output Compare Requirements................................ 253
PLL Clock ................................................................. 247
Reset, Watchdog Timer, Oscillator Start-up Timer,
Simple OC/PWM Mode Requirements ..................... 254
SPIx Master Mode (CKE = 0) Requirements............ 255
SPIx Master Mode (CKE = 1) Requirements............ 256
SPIx Slave Mode (CKE = 0) Requirements.............. 257
SPIx Slave Mode (CKE = 1) Requirements.............. 259
Timer1 External Clock Requirements ....................... 251
Timer2, Timer4, Timer6 and Timer8 External
Timer3, Timer5, Timer7 and Timer9 External
Baud Rate
Break and Sync Transmit Sequence ........................ 167
Flow Control Using UxCTS and UxRTS Pins ........... 167
Receiving in 8-bit or 9-bit Data Mode ....................... 167
Transmitting in 8-bit Data Mode................................ 167
Transmitting in 9-bit Data Mode................................ 167
UART1 Register Map.................................................. 34
UART2 Register Map.................................................. 35
Programming Considerations ................................... 223
Power-up Timer and Brown-out Reset
Requirements ................................................... 250
Clock Requirements ......................................... 252
Clock Requirements ......................................... 252
Generator (BRG) .............................................. 166
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