PIC24HJ128GP510-I/PT Microchip Technology Inc., PIC24HJ128GP510-I/PT Datasheet - Page 225

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PIC24HJ128GP510-I/PT

Manufacturer Part Number
PIC24HJ128GP510-I/PT
Description
MCU, 16-Bit, 128KB Flash, 8KB RAM, 85 I/O, TQFP-100
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24HJ128GP510-I/PT

A/d Inputs
32 Channel, 12-Bit
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
85
Interface
CAN/I2C/SPI/UART
Memory Type
Flash
Number Of Bits
16
Number Of Inputs
85
Number Of Pins
100
Package Type
100-pin TQFP
Programmable Memory
128K Bytes
Ram Size
8K Bytes
Speed
40 MIPS
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6 V
Voltage, Rating
3-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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21.0
The PIC24H instruction set is identical to that of the
PIC24F, and is a subset of the dsPIC30F/33F
instruction set.
Most instructions are a single program memory word
(24 bits). Only three instructions require two program
memory locations.
Each single-word instruction is a 24-bit word, divided
into an 8-bit opcode, which specifies the instruction
type and one or more operands, which further specify
the operation of the instruction.
The instruction set is highly orthogonal and is grouped
into five basic categories:
• Word or byte-oriented operations
• Bit-oriented operations
• Literal operations
• DSP operations
• Control operations
Table 21-1 shows the general symbols used in
describing the instructions.
The PIC24H instruction set summary in Table 21-2 lists
all the instructions, along with the status flags affected
by each instruction.
Most word or byte-oriented W register instructions
(including
operands:
• The first source operand which is typically a
• The second source operand which is typically a
• The destination of the result which is typically a
However, word or byte-oriented file register instructions
have two operands:
• The file register specified by the value ‘f’
• The destination, which could either be the file
© 2007 Microchip Technology Inc.
Note:
register ‘Wb’ without any address modifier
register ‘Ws’ with or without an address modifier
register ‘Wd’ with or without an address modifier
register ‘f’ or the W0 register, which is denoted as
‘WREG’
INSTRUCTION SET SUMMARY
This data sheet summarizes the features
of this group of PIC24HJXXXGPX06/X08/
X10 devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to the “PIC24H Family Reference
Manual”. Refer to the Microchip web site
(www.microchip.com)
PIC24H
sections.
barrel
shift
Family
instructions)
Reference
for
have
the
PIC24HJXXXGPX06/X08/X10
Manual
latest
three
Most bit-oriented instructions (including simple
rotate/shift instructions) have two operands:
• The W register (with or without an address
• The bit in the W register or file register
The literal instructions that involve data movement may
use some of the following operands:
• A literal value to be loaded into a W register or file
• The W register or file register where the literal
However, literal instructions that involve arithmetic or
logical operations use some of the following operands:
• The first source operand which is a register ‘Wb’
• The second source operand which is a literal
• The destination of the result (only if not the same
The control instructions may use some of the following
operands:
• A program memory address
• The mode of the table read and table write
modifier) or file register (specified by the value of
‘Ws’ or ‘f’)
(specified by a literal value or indirectly by the
contents of register ‘Wb’)
register (specified by the value of ‘k’)
value is to be loaded (specified by ‘Wb’ or ‘f’)
without any address modifier
value
as the first source operand) which is typically a
register ‘Wd’ with or without an address modifier
instructions
DS70175F-page 223

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