SAF1761BE/V1,557 NXP Semiconductors, SAF1761BE/V1,557 Datasheet - Page 123

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SAF1761BE/V1,557

Manufacturer Part Number
SAF1761BE/V1,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAF1761BE/V1,557

Lead Free Status / Rohs Status
Compliant

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Part Number:
SAF1761BE/V1,557
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Table 145. Frame Number register (address 0274h) bit description
Table 146. DcScratch - Device Controller Scratch register (address 0278h) bit allocation
Table 147. DcScratch - Device Controller Scratch register (address 0278h) bit description
Table 148. Unlock Device register (address 027Ch) bit allocation
SAF1761_1
Product data sheet
Bit
15 to 14
13 to 11
10 to 0
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
15 to 8
7 to 0
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Symbol
-
MICROSOF[2:0]
SOFR[10:0]
Symbol
SFIRH[7:0]
SFIRL[7:0]
10.6.4 DcScratch register
10.6.5 Unlock Device register
R/W
R/W
15
15
W
W
0
7
0
7
This 16-bit register can be used by the firmware to save and restore information. For
example, the device status before it enters the suspend state; see
To protect registers from getting corrupted when the SAF1761 goes into suspend, the
write operation is disabled. In this case, when the chip resumes, the Unlock Device
command must first be issued to this register before attempting to write to the rest of the
registers. This is done by writing unlock code (AA37h) to this register. The bit allocation of
the Unlock Device register is given in
Description
reserved
microframe number
frame number
Description
Scratch firmware information register (higher byte)
Scratch firmware information register (lower byte)
R/W
R/W
14
14
W
W
0
6
0
6
R/W
R/W
13
13
W
W
0
5
0
5
Rev. 01 — 18 November 2009
ULCODE[15:8] = AAh
ULCODE[7:0] = 37h
R/W
R/W
12
12
W
W
0
4
0
4
not applicable
not applicable
not applicable
not applicable
SFIRH[7:0]
unchanged
unchanged
SFIRL[7:0]
Table
R/W
R/W
148.
11
11
W
W
0
3
0
3
R/W
R/W
10
10
W
W
0
2
0
2
Hi-Speed USB OTG controller
Table
R/W
R/W
W
W
9
0
1
0
9
1
SAF1761
© NXP B.V. 2009. All rights reserved.
146.
123 of 166
R/W
R/W
W
W
8
0
0
0
8
0

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