PSB3186FV14NT Infineon Technologies, PSB3186FV14NT Datasheet - Page 160

• Manufacturer Part Number: PSB3186FV14NT
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV14NT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MSTI
SDS_
CONF
ACKxy ... Acknowledge Synchronous Transfer Interrupt
After an STIxy interrupt the microcontroller has to acknowledge the interrupt by setting
the corresponding ACKxy bit to “1”.
4.3.11
Value after reset: FF
For the MSTI register the following logical states are applied:
0: Interrupt is not masked
1: Interrupt is masked
For general information please refer to
STOVxy ... Synchronous Transfer Overflow for STIxy
Mask bits for the corresponding STOVxy interrupt bits.
STIxy ... Synchronous Transfer Interrupt xy
Mask bits for the corresponding STIxy interrupt bits.
4.3.12
Value after reset: 00
For general information on SDS_BCL please refer to
DIOM_INV ... DU/DD on IOM Timeslot Inverted
0: DU/DD are active during SDS HIGH phase and inactive during the LOW phase.
1: DU/DD are active during SDS LOW phase and inactive during the HIGH phase.
This bit has only effect if DIOM_SDS is set to ’1’ otherwise DIOM_INV is don’t care.
Data Sheet
7
7
STOV
MSTI - Mask Synchronous Transfer Interrupt
SDS_CONF - Configuration Register for Serial Data Strobe
21
0
STOV
H
H
20
0
STOV
11
0
STOV
10
0
Chapter
160
DIOM_
INV
STI
21
3.7.1.1.
DIOM_
SDS
STI
20
Chapter
Detailed Register Description
STI
11
0
3.7.2.
0
0
SDS_
BCL
STI
10
ISAC-SX TE
RD/WR (5A)
RD/WR (59)
PSB 3186
2003-01-30