PSB3186FV14NT Infineon Technologies, PSB3186FV14NT Datasheet - Page 22

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PSB3186FV14NT

Manufacturer Part Number
PSB3186FV14NT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB3186FV14NT

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
Table 2
Pin No.
MQFP-64
TQFP-64
41
3
1
5
38
IOM-2 Interface
52
53
49
51
Data Sheet
Symbol
ALE
CS
INT
RES
AMODE
FSC
DCL
BCL
DD
ISAC-SX TE Pin Definitions and Functions (cont’d)
Input (I)
Output (O)
Open Drain
(OD)
I
I
OD (O)
I
I
O
O
O
O (OD)
Function
Address Latch Enable
A HIGH on this line indicates an address on the
external address/data bus (multiplexed bus type
only).
ALE also selects the microcontroller interface bus
type (multiplexed or non multiplexed).
Chip Select
A low level indicates a microcontroller access to the
ISAC-SX TE.
Interrupt Request
INT becomes active low (open drain) if the ISAC-SX
TE requests an interrupt.
The polarity can be reprogrammed to high active
with push-pull characteristic.
Reset
A LOW on this input forces the ISAC-SX TE into a
reset state.
Address Mode
Selects between direct (0) and indirect (1) register
access mode.
Frame Sync
8-kHz frame synchronization signal.
Data Clock
IOM-2 interface data clock signal 1.536 MHz
(double bit clock).
Bit Clock
IOM-2 interface bit clock signal 768 kHz
(single bit clock).
Data Downstream
IOM-2 data signal in downstream direction.
22
Pin Configuration
ISAC-SX TE
PSB 3186
2003-01-30

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