PDLXT310NE.D4 Intel, PDLXT310NE.D4 Datasheet - Page 6

• Manufacturer Part Number: PDLXT310NE.D4
• Manufacturer: Intel

Specifications of PDLXT310NE.D4

• Number Of Line Interfaces: 1
• Lead Free Status / Rohs Status: Not Compliant

LXT310 — T1 CSU/ISDN PRI Transceiver
1.0
6
Package Topside Markings
Figure 2. LXT310 Pin Assignments and Package Markings
Marking
FPO #
Part #
Rev #
Lot #
RPOS / RDATA
TPOS / TDATA
RNEG / BPV
TNEG / UBS
XTALOUT
Pin Assignments and Signal Descriptions
XTALIN
JASEL
MODE
TGND
Unique identifier for this product family.
Identifies the particular silicon “stepping” — refer to the specification update for additional stepping information.
Identifies the batch.
Identifies the Finish Process Order.
MCLK
RCLK
TCLK
TTIP
LOS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CLKE / TAOS
SCLK / LLOOP
CS / RLOOP
SDO / LBO2
SDI / LB01
INT / NLOOP
RGND
RV+
RRING
RTIP
LATN
EGL
TRING
TV+
RPOS / RDATA
RNEG / BPV
Definition
XTALOUT
XTALIN
MODE
JASEL
RCLK
5
6
7
8
9
10
11
LXT3010PE XX
XXXXXX
XXXXXXXX
25
24
23
22
21
20
19
SDO / LBO2
SDI / LBO1
INT / NLOOP
RGND
RV+
RRING
RTIP
Datasheet