PSF21150HV14NP Infineon Technologies, PSF21150HV14NP Datasheet - Page 100
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PSF21150HV14NP
Manufacturer Part Number
PSF21150HV14NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSF21150HV14NP.pdf
(270 pages)
Specifications of PSF21150HV14NP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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Figure 52
Looping and Shifting Data
Figure 53
configuration possibilities with the bits TSS, DPS, EN and SWAP in the registers
TSDPxy or CDAx_CR:
a) Looping IOM-2 time slot data from DU to DD or vice versa (SWAP = 0)
b) Shifting data from TSa to TSb and TSc to TSd in both transmission directions (SWAP
= 1)
c) Switching data from TSa to TSb and looping from DU to DD or TSc to TSd and looping
from DD to DU respectively
TSa is programmed in TSDP10, TSb in TSDP11, TSc in TSDP20 and TSd in TSDP21.
It should also be noted that the input control of CDA registers is swapped if SWAP=1
while the output control is not affected (e.g. for CDA11 in example a: EN_I1=1 and
EN_O1=1, whereas for CDA11 in example b: EN_I0=1 and EN_O1=1).
Data Sheet
*) In the normal mode (SWAP=0) the input of CDAx0 and CDAx1 is enabled via EN_I0 and
EN_I1, respectively. If SWAP=1 EN_I0 controls the input of CDAx1 and EN_I1 controls the
input of CDAx0. The output control (EN_O0 and EN_O1) is not affected by SWAP.
x = 1 or 2; a,b = 0...11
gives examples for typical configurations with the above explained control and
Data Access via CDAx1 and CDAx2 Register Pairs
(EN_O0)
1
output
CDAx0
Enable
1
TSa
0
TSa
input *
(EN_I0)
0
1
1
1
CDA_CRx
Register
Control
100
(SWAP)
Input
Swap
Description of Functional Blocks
1
(EN_I1)
1
input *
1
CDAx1
TSb
0
TSb
Enable
0
1
(EN_O1)
output
PSB/PSF 21150
1
2003-01-30
IOM_HAND.FM4
IPAC-X
DD
DU
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