PSF21150HV14NP Infineon Technologies, PSF21150HV14NP Datasheet - Page 51
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PSF21150HV14NP
Manufacturer Part Number
PSF21150HV14NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSF21150HV14NP.pdf
(270 pages)
Specifications of PSF21150HV14NP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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Figure 20
Note: The ITU I.430 standard specifies S1 - S5 for optional use.
Data Sheet
– F
– L.
– D
– E
– F
– N
– B1
– B2
– A
– S
– M
A
Framing Bit
D.C. Balancing Bit
D-Channel Data Bit
D-Channel Echo Bit
Auxiliary Framing Bit
B1-Channel Data Bit
B2-Channel Data Bit
Activation Bit
S-Channel Data Bit
Multiframing Bit
Frame Structure at Reference Points S and T (ITU I.430)
F = (0b) ® identifies new frame (always
positive pulse, always code violation)
L. = (0b) ® number of binary ZEROs sent
after the last L. bit was odd
Signaling data specified by user
E = D ® received E-bit is equal to transmitted
D-bit
See section 6.3 in ITU I.430
N =
User data
User data
A = (0b) ® INFO 2 transmitted
A = (1b) ® INFO 4 transmitted
S
M = (1b) ® Start of new multi-frame
51
1
channel data (see note below)
F
A
Description of Functional Blocks
PSB/PSF 21150
2003-01-30
IPAC-X
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