PSF21150HV14NP Infineon Technologies, PSF21150HV14NP Datasheet - Page 128
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PSF21150HV14NP
Manufacturer Part Number
PSF21150HV14NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSF21150HV14NP.pdf
(270 pages)
Specifications of PSF21150HV14NP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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3.7.5
D-channel access control is defined to guarantee all connected TEs and HDLC
controllers a fair chance to transmit data in the D-channel. Collisions are possible:
• on the IOM-2 interface if there is more than one HDLC controller connected
or
• on the S-interface when there is more than one terminal connected in a point to
Both arbitration mechanisms are implemented in the IPAC-X and will be described in the
following two chapters.
3.7.5.1
The TIC bus is imlemented to organize the access to the layer-1 functions provided in
the IPAC-X (C/I-channel) and to the D-channel from up to 7 external communication
controllers (see
Note: The TIC Bus can be used in TE/iNT mode only. In other modes it has to be
To this effect the outputs of the D-channel controllers (e.g. ICC - ISDN Communication
Controller PEB 2070) are wired-or (negative logic, i.e. a “0” wins) and connected to pin
DU. The inputs of the ICCs are connected to pin DD. External pull-up resistors on DU/
DD are required. The arbitration mechanism must be activated by setting MODED.DIM2-
0=00x.
Data Sheet
multipoint configuration (NT ® TE1 … TE8).
switched off in order not to disturb the layer-1 control and the HDLC
controller. This is done by setting bit DIM 1 in register Mode D and bit 4 in
register IOM_CR. For more details please refer to the application note
“Reconfigurable PBX”.
D-Channel Access Control
TIC Bus D-Channel Access Control
Figure
72).
128
Description of Functional Blocks
PSB/PSF 21150
2003-01-30
IPAC-X
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