M69000 Asiliant Technologies, M69000 Datasheet - Page 131
M69000
Manufacturer Part Number
M69000
Description
Manufacturer
Asiliant Technologies
Datasheet
1.M69000.pdf
(360 pages)
Specifications of M69000
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9-38
CR74
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 74h
7-6
5
4-0
&+,36
7
Reserved
NTSC/PAL Horizontal Pulse Width Round Off Control
NTSC/PAL Horizontal Equalization Pulse Width
Reserved
69000 Databook
NTSC/PAL Horizontal Pulse Width Register
0: Enables the generation of horizontal equalization pulses with a width that is
approximately equal to half the width of the horizontal sync pulse. The actual width is
determined using bits 4-0 of this register.
1: Disables the generation of horizontal equalization pulses.
These 5 bits specify the pulse width of the horizontal equalization pulse used to generate
the NTSC/PAL-compliant composite sync. Normally, the width of this horizontal
equalization pulse is approximately half the width of the horizontal sync pulse.
These 5 bits should be programmed with a value equal to the actual pulse width, subtracted
by 1. The width of the actual equalization pulse can be calculated as follows:
6
equalization pulse width - 1 = ( CR74[4:0] - CR74[5] )
Round Off
5
Subject to Change Without Notice
CRT Controller Registers
4
NTSC/PAL Horizontal Equalization Pulse Width
3
2
2
Revision 1.3 8/31/98
1
0
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