M69000 Asiliant Technologies, M69000 Datasheet - Page 132

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

CR75
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 75h
7-4
3-0
CR76
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 76h
7-0
&+,36
7
7
Reserved
These bits should always be written with the value of 0.
Memory Burst Access Segment Length
Memory Burst Access Segments Per Scanline
69000 Databook
NTSC/PAL Filtering Burst Read Length Register
NTSC/PAL Filtering Burst Read Quantity Register
The flicker reduction filtering processes are performed on pixel data as it is sequentially
read from the frame buffer to be displayed. These filtering processes involve the averaging
of current pixel data that is about to be displayed with data for adjacent pixels. Depending
upon which filtering processes are selected, accesses to the frame buffer can become non-
sequential. To optimize the use of the frame buffer, burst accesses of one or more
quadwords are performed to read this data. These 4 bits provide a means of adjusting how
many quadwords of pixel data are read from the frame buffer in each burst access.
These 8 bits specify the number of burst reads required to supply both current pixel data
and pixel data from adjacent pixels for each scanline’s worth of displayable pixel data.
Refer to the NTSC/PAL Filtering Burst Read Length Register (CR75) for an explanation of
these burst reads.
Reserved (Writable)
6
6
(xxxx)
Memory Burst Access Segments Per Scanline
5
5
Subject to Change Without Notice
CRT Controller Registers
4
4
(xxxx:xxxx)
3
3
Memory Burst Read Length
2
2
(xxxx)
Revision 1.3 8/31/98
1
1
0
0
9-39