M69000 Asiliant Technologies, M69000 Datasheet - Page 85
M69000
Manufacturer Part Number
M69000
Description
Manufacturer
Asiliant Technologies
Datasheet
1.M69000.pdf
(360 pages)
Specifications of M69000
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RBASE
read/write at PCI configuration offset 30h
byte, word, or doubleword accessible
accessible only via PCI configuration cycles
31-18
17-1
0
Note:
&+,36
31
15
ROM Space Base Address
These 14 bits select the base address for this 256KB ROM space used by the 69000 for the video
BIOS ROM.
ROM Space Size
These 17 bits always return 0 to indicate that the size of this ROM space is 256KB.
Address Decode Enable
0: Disable access to the video BIOS ROM. This is the default after reset.
1: Enable access to the video BIOS ROM.
Bit 1 of the Device Control register (DEVCTL) must also be set to 1 for the video BIOS ROM to be
accessible. Also, the ROM address space must not be programmed to a range that overlaps the
area specified by the MBASE register.
30
14
69000 Databook
29
13
ROM Base Address Register
28
12
27
11
ROM Space Base Address
26
10
Subject to Change Without Notice
(0000:0000:0000:00)
PCI Configuration Registers
(0000:0000:0000:000)
ROM Space Size
25
9
24
8
23
7
22
6
21
5
20
4
19
3
Revision 1.3 8/31/98
18
2
ROM Space
17
1
Size
(00)
Addr
Enbl
7-13
(0)
16
0
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