M69000 Asiliant Technologies, M69000 Datasheet - Page 146

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

GR01
read/write at I/O address 3CFh with index at address 3CEh set to 01h
7-4
3-0
GR02
read/write at I/O address 3CFh with index at address 3CEh set to 02h
7-4
3-0
&+,36
7
7
Reserved
Enable Set/Reset Plane 3 through Enable Set/Reset Plane 0
0: The corresponding memory plane can be read from or written to by the CPU without any special
bitwise operations taking place.
1: The corresponding memory plane is set to 0 or 1 as specified in the Set/Reset Register (GR00).
This register works in conjunction with the Set/Reset Register (GR00). The Write Mode bits (bits 0
and 1) must be set for Write Mode 0 for this register to have any effect.
Reserved
Color Compare Plane 3 through Color Compare Plane 0
When the Read Mode bit (bit 3) of the Graphics Mode Register (GR05) is set to select Read Mode
1, all 8 bits of each byte of each of the 4 memory planes of the frame buffer corresponding to the
address from which a CPU read access is being performed are compared to the corresponding bits
in this register (if the corresponding bit in the Color Don’t Care Register (GR07) is set to 1). The
value that the CPU receives from the read access is an 8-bit value that shows the result of this
comparison, wherein a value of 1 in a given bit position indicates that all of the corresponding bits
in the bytes across all of the memory planes that were included in the comparison had the same
value as their memory plane’s respective bits in this register.
69000 Databook
Enable Set/Reset Register
Color Compare Register
6
6
Reserved
Reserved
5
5
Subject to Change Without Notice
Graphics Controller Registers
4
4
Color Comp
Reset Pln 3
Enbl Set/
Plane 3
3
3
Color Comp
Reset Pln 2
Enbl Set/
Plane 2
2
2
Color Comp
Reset Pln 1
Enbl Set/
Plane 1
Revision 1.3 8/31/98
1
1
Color Comp
Reset Pln 0
Enbl Set/
Plane 0
0
0
11-3