AD9991KCP Analog Devices Inc, AD9991KCP Datasheet - Page 7

• Manufacturer Part Number: AD9991KCP
• Description: IC CCD SIGNAL PROCESSOR 56-LFCSP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 10-Bitr

Specifications of AD9991KCP

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 56-LFCSP
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 10b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Package Type: LFCSP EP
• Number Of Channels: 1
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

TERMINOLOGY
Differential Nonlinearity (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Thus every
code must have a fi nite width. No missing codes guaranteed to
10-bit resolution indicates that all 1024 codes must be present
over all operating conditions.
Peak Nonlinearity
Peak nonlinearity, a full signal chain specifi cation, refers to
the peak deviation of the output of the AD9991 from a true
straight line. The point used as zero scale occurs 0.5 LSB
before the fi rst code transition. Positive full scale is defi ned as
a level 1.5 LSB beyond the last code transition. The deviation
is measured from the middle of each particular output code to
the true straight line. The error is then expressed as a percent-
EQUIVALENT CIRCUITS
REV. 0
THREE-
STATE
DATA
Circuit 2. Digital Data Outputs
AVDD
AVSS
Circuit 1. CCDIN
R
DVDD
DVSS
AVSS
DRVDD
DRVSS
DOUT
–7–
RG, H1–H4
age of the 2 V ADC full-scale signal. The input signal is always
appropriately gained up to fi ll the ADC’s full-scale range.
Total Output Noise
The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output codes is calculated in
LSB and represents the rms noise level of the total signal chain at
the specifi ed gain setting. The output noise can be converted to
an equivalent voltage using the relationship 1 LSB = (ADC Full
Scale/2
AD9991, 1 LSB is 1.95 mV.
Power Supply Rejection (PSR)
The PSR is measured with a step change applied to the supply
pins. The PSR specifi cation is calculated from the change in the
data outputs for a given step change in the supply voltage.
ENABLE
n
codes), where n is the bit resolution of the ADC. For the
Circuit 4. H1–H4, RG Drivers
Circuit 3. Digital Inputs
DVDD
DVSS
HVDD OR
RGVDD
HVSS OR
RGVSS
AD9991
OUTPUT