N25Q128A11B1240F Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC., N25Q128A11B1240F Datasheet - Page 93

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N25Q128A11B1240F

Manufacturer Part Number
N25Q128A11B1240F
Description
IC SRL FLASH 128MB NMX 24-BGA
Manufacturer
Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC.
Series
Forté™r
Datasheet

Specifications of N25Q128A11B1240F

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16M x 8)
Speed
108MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.7 V ~ 2 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-TBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
N25Q128A11B1240F

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
N25Q128A11B1240F
Manufacturer:
Micron Technology Inc
Quantity:
10 000
9.1.13
9.1.14
DQ0
DQ1
DQ0
DQ1
C
S
C
S
Mode 3
Mode 0
18 19 20
Dual Input Extended Fast Program
The Dual Input Extended Fast Program (DIEFP) instruction is very similar to the Dual Input
Fast Program (DIFP), except that the address bits are shifted in on two pins (pin DQ0 and
pin DQ1) instead of only one.
Figure 22. Dual Input Extended Fast Program instruction sequence
Quad Input Fast Program
The Quad Input Fast Program (QIFP) instruction is very similar to the Dual Input Fast
Program (DIFP) instruction, except that the data are entered on four pins (pin DQ0, pin
DQ1, pin W/VPP/DQ2 and pin HOLD/ (DQ3) instead of only two. Inputting the data on four
pins instead of two doubles the data transfer bandwidth compared to the Dual Input Fast
Program (DIFP) instruction.
The Quad Input Fast Program (QIFP) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes and at least one data byte on Serial
Data input (DQ0).
If the 8 least significant address bits (A7-A0) are not all zero, all transmitted data that goes
beyond the end of the current page are programmed from the start address of the same
page (from the address whose 8 least significant bits (A7-A0) are all zero). Chip Select (S)
must be driven Low for the entire duration of the sequence.
6
7
Data In 1
0
4
5
21
MSB
1
2
3
22 23 24 25 26 27 28 29 30 31 32 33
2
Instruction
1
0
3
7
6
Data In 2
4
4
5
MSB
5
2
3
6
0
1
7
6
7
6
7
8
MSB
Data In 3
4
5
4
5
9 10 11 12 13 14
2
3
2
3
1
0
0
1
7
6
6
7
Data In 4
MSB
Address
5
4
4
5
3
2
34
2
3
1
0
35
0
1
15 16 17 18 19 20
6
7
Dual_Input_Extended_Fast_Program
4
6
7
5
Data In 256
2
4
5
3
MSB
0
2
3
1
Dummy Cycles
0
1
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