PC28F512P30EFA Micron Technology Inc, PC28F512P30EFA Datasheet - Page 86
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PC28F512P30EFA
Manufacturer Part Number
PC28F512P30EFA
Description
Manufacturer
Micron Technology Inc
Datasheet
1.PC28F512P30EFA.pdf
(86 pages)
Specifications of PC28F512P30EFA
Cell Type
NOR
Density
512Mb
Interface Type
Parallel/Serial
Address Bus
25b
Operating Supply Voltage (typ)
1.8V
Operating Temp Range
-40C to 85C
Package Type
BGA
Program/erase Volt (typ)
8.5 to 9.5V
Sync/async
Async/Sync
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
2V
Word Size
16b
Number Of Words
32M
Supply Current
31mA
Mounting
Surface Mount
Pin Count
64
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PC28F512P30EFA
Manufacturer:
MICRON
Quantity:
1 000
Company:
Part Number:
PC28F512P30EFA
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Appendix C Revision History
Datasheet
86
Aug 2009
Nov 2009
Jan 2008
Feb 2010
Apr 2010
Date
Revision
01
02
03
04
05
Description
Initial release.
Add Top/Bottom device information such as memory map, device ID, CFI, ordering information etc.
Add 40Mhz specification for TSOP package.
Add a Note to clarify the SR output after E8 command in
page 24
Align flowchart of Program/Erase Suspend as same as 130nm.
Align flowchart of block locking operation as same as 130nm.
Add note 7 to flowchart of Buffer program.
Update Ordering Information.
Update RCR.7 in
Add 2-Gbit density related information such as memory map, CFI, ordering information, 2G DC
current spec, capacitance, dual-die configuration and Device ID note etc.
Update suspend latency spec.
Update on TSOP package with VCCQ and Temp.
Update the erase and program performance.
Ordering information with Device feature digit.
Add 2 RC part in valid combination.
CFI update aligned with performance update.
Update the ADV# signal connection for TSOP package.
Add comments for synchronous page mode and synchronous mode read.
Burst latency count update in
BEFP setup time update from 5 to 20.
Update 2-Gbit Tacc time 95ns.
.
“Read Configuration Register Description” on page 35
Table 14, “LC and Frequency Support” on page 37
“Buffered Programming” on
Order Number: 208042-05
.
P30-65nm
Apr 2010
.