UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 206

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
204
Symbol
ADCR0
(1) Successive approximation register (SAR)
(2) A/D conversion result register 0 (ADCR0)
(3) Sample & hold circuit
(4) Voltage comparator
(5) Series resistor string
(6) ANI0 to ANI7 pins
This register compares the voltage value of an analog input with the value of a voltage tap (compare voltage)
from the series resistor string, and holds the result of the comparison starting from the most significant bit
(MSB).
When the result is held down to the least significant bit (LSB) (end of A/D conversion), the contents of SAR
are transferred to A/D conversion result register 0 (ADCR0).
This is a 16-bit register that stores the results of A/D conversion. The lower 6 bits are fixed to 0. Every time
an A/D conversion is complete, the conversion results are loaded from the successive approximation register
(SAR). The loaded data is stored in ADCR0 in order from the most significant bit (MSB).
ADCR0 is read with a 16-bit memory manipulation instruction.
RESET input makes the contents of this register undefined.
Caution When a write operation is performed on A/D converter mode register 0 (ADM0) and analog
The sample & hold circuit samples analog input signals sequentially sent from the input circuit on a one-by-
one basis, and sends the sampled signals to the voltage comparator. This circuit holds the sampled analog
input voltage value during A/D conversion.
The voltage comparator compares the analog input with the output voltage of the series resistor string.
The series resistor string is connected between AV
with the analog input.
These are the eight analog input pin channels of the A/D converter. They input the analog signals that are
converted to digital values.
input channel specification register 0 (ADS0), the contents of ADCR0 may become undefined.
Read the conversion results after the conversion operation is complete and before the write
operation to ADM0 and ADS0. Correct conversion results may not read out at a timing other
than the above.
FF19H
CHAPTER 11 A/D CONVERTER
User’s Manual U13029EJ7V1UD
REF
0
and AV
FF18H
0
0
SS
and generates the voltage to be compared
0
0
0
Address
FF18H,
FF19H
After reset
Undefined
R/W
R

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