UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 207

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
11.3 Registers Controlling A/D Converter
(7) AVREF pin
(8) AV
(9) AV
The following two registers control the A/D converter.
• A/D converter mode register 0 (ADM0)
• Analog input channel specification register 0 (ADS0)
(1) A/D converter mode register 0 (ADM0)
Cautions 1. Observe the rated input voltage range of ANI0 to ANI7. If a voltage of AV
This pin inputs a reference voltage to the A/D converter.
Based on the voltage applied between AV
digital signal.
Caution A series resistor string of several 10 k
This is the ground pin of the A/D converter. Always make this pin the same potential as the V
when the A/D converter is not used.
This is the analog power supply pin of the A/D converter. Always make this pin the same potential as the
V
This register sets conversion time of an analog input to be converted into a digital value, starts/stops the
conversion operation, and sets an external trigger.
ADM0 is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
DD0
SS
DD
pin even when the A/D converter is not used.
pin
pin
If the output impedance of the reference voltage source is high, therefore, the error of the
reference voltage increases by connecting the impedance in series with the series resistor
string between the AV
2. The analog input pins (ANI0 to ANI7) are also used as input port pins (P10 to P17).
or AV
channel, the converted value of that channel becomes undefined, or the converted value
of the other channels may be affected.
When A/D conversion is performed with any of ANI0 to ANI7 selected, do not execute the
input instruction to port 1 while conversion is in progress; otherwise, the conversion
resolution may be degraded.
If a digital pulse is applied to the pins adjacent to the pin currently being used for A/D
conversion, the expected value of the A/D conversion may not be obtained due to
coupling noise. Therefore, do not apply a pulse to the adjacent pins to the pin under going
A/D conversion.
SS
or lower (even within the range of absolute maximum ratings) is applied to a
CHAPTER 11 A/D CONVERTER
REF
User’s Manual U13029EJ7V1UD
and AV
REF
and AV
SS
pins.
SS
is connected between the AV
, the signal input to ANI0 to ANI7 is converted into a
REF
and AV
REF
SS0
or higher,
SS
pin even
pins.
205

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