UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 296

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
16.1.2 Register controlling standby function
controlled by the oscillation stabilization time select register (OSTS).
time required to release the mode is 2
294
The wait time during which oscillation is stabilized after the STOP mode is released by an interrupt request is
OSTS is set by an 8-bit memory manipulation instruction.
RESET input sets this register to 04H. Therefore, to release the STOP mode by inputting the RESET signal, the
Note
Caution The wait time when the STOP mode is released does not include the time required for the clock
Remark f
Expanded-specification products only.
Symbol
OSTS
oscillation to start after the STOP mode has been released (see “a” in the figure below). The
same applies when the STOP mode is released by RESET input or generation of an interrupt
request.
X
: System clock oscillation frequency
Figure 16-1. Format of Oscillation Stabilization Time Select Register
OSTS2
Other than above
7
0
0
0
0
0
1
OSTS1
6
0
0
0
1
1
0
OSTS0
5
0
0
1
0
1
0
17
CHAPTER 16 STANDBY FUNCTION
/f
Voltage
waveform
of X1 pin
V
4
0
2
2
2
2
2
Setting prohibited
X
SS1
12
14
15
16
17
Selects oscillation stabilization tim when STOP mode released
.
User’s Manual U13029EJ7V1UD
/f
/f
/f
/f
/f
X
X
X
X
X
3
0
STOP mode released
OSTS2 OSTS1 OSTS0
341.3 s
1.36 ms
2.73 ms
5.46 ms
10.9 ms
2
At f
a
X
1
= 12 MHz
0
Note
Address
FFFAH
488.8 s
1.96 ms
3.91 ms
7.82 ms
15.6 ms
At f
X
After reset
= 8.38 MHz
04H
R/W
R/W

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