UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 82

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
3.4.4 Short direct addressing
80
Effective address
[Function]
[Operand Format]
[Example]
[Operation]
This addressing directly addresses a memory area to be manipulated from a fixed space by using the 8-bit data
in an instruction word.
This addressing is applicable to the fixed 256-byte space of FE20H to FF1FH. The internal high-speed RAM
is mapped to addresses FE20H to FEFFH, and special function registers (SFRs) are mapped to addresses FF00H
to FF1FH.
The SFR area (FF00H to FF1FH) to which short direct addressing is applied is a part of the entire SFR area.
Ports that are frequently accessed in the program, and compare and capture registers of timer/event counters
are mapped to the SFR area. These SFRs can be manipulated with a few bytes and clocks.
Bit 8 of the effective address is 0 if the 8-bit immediate data is in the range of 20H to FFH, and 1 if the data is
in the range of 00H to 1FH. Refer to [Operation].
MOV 0FE30H, #50H; To specify FE30H as saddr and 50H as immediate data
saddr
saddrp
Representation
When 8-bit immediate data is 20H to FFH,
When 8-bit immediate data is 00H to 1FH,
15
7
1
1
Label or immediate data FE20H to FF1FH
Label or immediate data FE20H to FF1FH (even address only)
1
saddr-offset
Instruction code
OP code
1
1
1
CHAPTER 3 CPU ARCHITECTURE
1
User’s Manual U13029EJ7V1UD
0
8
0 0 0 1 0 0 0 1
0 0 1 1 0 0 0 0
0 1 0 1 0 0 0 0
Description
= 1
= 0
0
OP code
30H (saddr-offset)
50H (immediate data)
Short direct memory

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