SAB80C535N Infineon Technologies, SAB80C535N Datasheet - Page 24

• Manufacturer Part Number: SAB80C535N
• Manufacturer: Infineon Technologies

Specifications of SAB80C535N

• Cpu Family: C500
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 12MHz
• Interface Type: Serial
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 256Byte
• # I/os (max): 48
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Timer/Counters
The SAB 80C515 contains three 16-bit timers/counters which are useful in many applications
for timing and counting. The input clock for each timer/counter is 1/12 of the oscillator frequency
in the timer operation or can be taken from an external clock source for the counter operation
(maximum count rate is 1/24 of the oscillator frequency).
– Timer/Counter 0 and 1
These timers/counters can operate in four modes:
Mode 0: 8-bit timer/counter with 32:1 prescaler
Mode 1: 16-bit timer/counter
Mode 2: 8-bit timer/counter with 8-bit auto-reload
Mode 3: Timer/counter 0 is configured as one 8-bit timer/counter and one 8-bit timer;
External inputs INT0 and INT1 can be programmed to function as a gate for
timer/counters 0 and 1 to facilitate pulse width measurements.
– Timer/Counter 2
Timer/counter 2 of the SAB 80C515 is a 16-bit timer/counter with several additional features. It
offers a 2:1 prescaler, a selectable gate function, and compare, capture and reload functions.
Corresponding to the 16-bit timer register there are four 16-bit capture/compare registers, one
of them can be used to perform a 16-bit reload on a timer overflow or external event. Each of
these registers corresponds to a pin of port 1 for capture input/compare output.
Figure 3 shows a block diagram of timer/counter 2.
Reload
A 16-bit reload can be performed with the 16-bit CRC register consisting of CRCL and CRCH.
There are two modes from which to select:
Mode 0: Reload is caused by a timer 2 overflow (auto-reload).
Mode 1: Reload is caused in response to a negative transition at pin T2EX (P1.5), which
Capture
This feature permits saving the actual timer/counter contents into a selected register
upon an external event or a software write operation. Two modes are provided to latch
the current 16-bit value in timer 2 registers TL2 and TH2 into a dedicated capture register:
Mode 0: Capture is performed in response to a transition at the corresponding port 1 pins
Mode 1: Write operation into the low-order byte of the dedicated capture register causes
Semiconductor Group
Timer/counter 1 in this mode holds its count.
can also request an interrupt.
CC0 to CC3.
the timer 2 contents to be latched into this register.
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SAB 80C515/80C535