TDA5252XT Infineon Technologies, TDA5252XT Datasheet - Page 21

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TDA5252XT

Manufacturer Part Number
TDA5252XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TDA5252XT

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (max)
5.5V
Lead Free Status / Rohs Status
Compliant
Figure 2-5
2.4.10
The data slicer is a fast comparator with a bandwidth of 100kHz. The self-adjusting threshold is
generated by a RC-network (LPF) or by use of one or both peak detectors depending on the
baseband coding scheme. This can be controlled by the D15 bit of the CONFIG register as shown
in the following table.
Table 2-4
2.4.11
Two separate Peak Detectors are available. They are generating DC voltages in a fast-attack and
slow-release manner that are proportional to the positive and negative peak voltages appearing in
the data signal. These voltages may be used to generate a threshold voltage for non-Manchester
encoded signals, for example. The time-constant of the fast-attack/slow-release action is
determined by the RC network with external capacitor.
2.4.12
The reference oscillator is an NIC oscillator type (Negative Impedance Converter) with a crystal
operating in serial resonance. The nominal operating frequency of 19.0625MHz and the
frequencies for FSK modulation can be adjusted via 3 external capacitors. Via microcontroller and
bus interface the chip-internal capacitors can be used for finetuning of the nominal and the FSK
modulation frequencies. This finetuning of the crystal oscillator allows to eliminate frequency errors
due to crystal or component tolerances.
2.4.13
A Bandgap Reference Circuit provides a temperature stable 1.2V reference voltage for the device.
A power down mode is available to switch off all subcircuits that are controlled by the bidirectional
Powerdown&DataDetect PwdDD pin (pin 27) as shown in the following table. Power down mode
can either be activated by pin 27 or bit D14 in Register 00h. In power down mode also pin 28 (DATA)
is affected (see Section 2.4.17).
Data Sheet
D15
Bit
Data Slicer
Peak Detectors
Crystal Oscillator
Bandgap Reference Circuitry and Powerdown
Sub Address 00H: CONFIG
Function
SLICER
Data Filter architecture
ASK / FSK
INTERNAL BUS
0= Lowpass Filter, 1= Peak Detector
21
Description
OTA
Functional Description
Default
TDA5252 G2
Version 1.1
0
2007-02-26
data_filter.wmf

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