DS21354L Maxim Integrated Products, DS21354L Datasheet - Page 2

IC TXRX E1 1-CHIP 3.3V 100-LQFP

DS21354L

Manufacturer Part Number
DS21354L
Description
IC TXRX E1 1-CHIP 3.3V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21354L

Function
Single-Chip Transceiver
Interface
E1, HDLC
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
Remote and AIS Alarm Detector / Generator
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-

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1. INTRODUCTION.................................................................................................................. 6
2. BLOCK DIAGRAM .............................................................................................................. 9
3. PIN DESCRIPTION............................................................................................................ 10
4. PARALLEL PORT ............................................................................................................. 25
5. CONTROL, ID, AND TEST REGISTERS .......................................................................... 30
6. STATUS AND INFORMATION REGISTERS .................................................................... 43
7. ERROR COUNT REGISTERS........................................................................................... 50
8. DS0 MONITORING FUNCTION ........................................................................................ 53
9. SIGNALING OPERATION................................................................................................. 56
10. PER-CHANNEL CODE GENERATION AND LOOPBACK............................................... 60
11. CLOCK BLOCKING REGISTERS..................................................................................... 63
1.1. F
1.2. DOCUMENT REVISION HISTORY .............................................................................................................8
3.1. PIN FUNCTION DESCRIPTION ................................................................................................................14
3.1.1.
3.1.2.
3.1.3.
3.1.4.
3.1.5.
3.1.6.
3.1.7.
4.1. REGISTER MAP ........................................................................................................................................25
5.1. POWER-UP SEQUENCE ..........................................................................................................................30
5.2. SYNCHRONIZATION AND RESYNCHRONIZATION...............................................................................32
5.3. FRAMER LOOPBACK ...............................................................................................................................36
5.4. AUTOMATIC ALARM GENERATION........................................................................................................38
5.5. REMOTE LOOPBACK ...............................................................................................................................40
5.6. LOCAL LOOPBACK...................................................................................................................................40
6.1. CRC4 SYNC COUNTER............................................................................................................................45
7.1. BPV OR CODE VIOLATION COUNTER ...................................................................................................50
7.2. CRC4 ERROR COUNTER.........................................................................................................................51
7.3. E-BIT COUNTER .......................................................................................................................................51
7.4. FAS E
9.1. PROCESSOR-BASED SIGNALING ..........................................................................................................56
9.2. HARDWARE-BASED SIGNALING ............................................................................................................58
9.2.1.
9.2.2.
10.1. TRANSMIT-SIDE CODE GENERATION ................................................................................................60
10.1.1. Simple Idle Code Insertion and Per-Channel Loopback.....................................................................60
10.1.2. Per-Channel Code Insertion ...............................................................................................................61
10.2. RECEIVE-SIDE CODE GENERATION...................................................................................................62
UNCTIONAL
Transmit-Side Pins..............................................................................................................................14
Receive-Side Pins...............................................................................................................................17
Parallel Control Port Pins ....................................................................................................................20
JTAG Test Access Port Pins...............................................................................................................22
Interleave Bus Operation Pins ............................................................................................................22
Line Interface Pins ..............................................................................................................................23
Supply Pins .........................................................................................................................................24
Receive Side .......................................................................................................................................58
Transmit Side ......................................................................................................................................59
RROR
D
C
ESCRIPTION
OUNTER
.................................................................................................................................52
..............................................................................................................................7
TABLE OF CONTENTS
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